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Yuan-Jen Lee

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2008
1EEChin-Lung Su, Chih-Wea Tsai, Cheng-Wen Wu, Chien-Chung Hung, Young-Shying Chen, Ding-Yeong Wang, Yuan-Jen Lee, Ming-Jer Kao: Write Disturbance Modeling and Testing for MRAM. IEEE Trans. VLSI Syst. 16(3): 277-288 (2008)

Coauthor Index

1Young-Shying Chen [1]
2Chien-Chung Hung [1]
3Ming-Jer Kao [1]
4Chin-Lung Su [1]
5Chih-Wea Tsai [1]
6Ding-Yeong Wang [1]
7Cheng-Wen Wu [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)