| |
| 2008 | ||
|---|---|---|
| 1 | EE | Chin-Lung Su, Chih-Wea Tsai, Cheng-Wen Wu, Chien-Chung Hung, Young-Shying Chen, Ding-Yeong Wang, Yuan-Jen Lee, Ming-Jer Kao: Write Disturbance Modeling and Testing for MRAM. IEEE Trans. VLSI Syst. 16(3): 277-288 (2008) |
| 1 | Young-Shying Chen | [1] |
| 2 | Chien-Chung Hung | [1] |
| 3 | Ming-Jer Kao | [1] |
| 4 | Chin-Lung Su | [1] |
| 5 | Chih-Wea Tsai | [1] |
| 6 | Ding-Yeong Wang | [1] |
| 7 | Cheng-Wen Wu | [1] |