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M. Stecher

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2005
4EEM. Heer, V. Dubec, M. Blaho, Scrgey Bychikhin, Dionyz Pogany, E. Gornik, M. Denison, M. Stecher, G. Groos: Automated setup for thermal imaging and electrical degradation study of power DMOS devices. Microelectronics Reliability 45(9-11): 1688-1693 (2005)
2003
3EEM. Blaho, Dionyz Pogany, E. Gornik, M. Denison, G. Groos, M. Stecher: Study of internal behavior in a vertical DMOS transistor under short high current stress by an interferometric mapping method. Microelectronics Reliability 43(4): 545-548 (2003)
2001
2EEHarald Gossner, T. Müller-Lynch, K. Esmark, M. Stecher: Wide range control of the sustaining voltage of electrostatic discharge protection elements realized in a smart power technology. Microelectronics Reliability 41(3): 385-393 (2001)
1 Scrgey Bychikhin, Martin Litzenberger, R. Pichler, Dionyz Pogany, E. Gornik, G. Groos, M. Stecher: Thermal and free carrier laser interferometric mapping and failure analysis of anti-serial smart power ESD protection structures. Microelectronics Reliability 41(9-10): 1501-1506 (2001)

Coauthor Index

1M. Blaho [3] [4]
2Scrgey Bychikhin [1] [4]
3M. Denison [3] [4]
4V. Dubec [4]
5K. Esmark [2]
6E. Gornik [1] [3] [4]
7Harald Gossner [2]
8G. Groos [1] [3] [4]
9M. Heer [4]
10Martin Litzenberger [1]
11T. Müller-Lynch [2]
12R. Pichler [1]
13Dionyz Pogany [1] [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)