2008 |
9 | EE | Puneet Gupta,
Andrew B. Kahng,
Youngmin Kim,
Saumil Shah,
Dennis Sylvester:
Investigation of diffusion rounding for post-lithography analysis.
ASP-DAC 2008: 480-485 |
8 | EE | Ashish Srivastava,
Kaviraj Chopra,
Saumil Shah,
Dennis Sylvester,
David Blaauw:
A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 272-285 (2008) |
7 | EE | Dennis Sylvester,
Kanak Agarwal,
Saumil Shah:
Variability in nanometer CMOS: Impact, analysis, and minimization.
Integration 41(3): 319-339 (2008) |
2007 |
6 | EE | Puneet Gupta,
Andrew B. Kahng,
Youngmin Kim,
Saumil Shah,
Dennis Sylvester:
Line-End Shortening is Not Always a Failure.
DAC 2007: 270-271 |
2006 |
5 | EE | Saumil Shah,
Puneet Gupta,
Andrew B. Kahng:
Standard cell library optimization for leakage reduction.
DAC 2006: 983-986 |
2005 |
4 | EE | Ashish Srivastava,
Saumil Shah,
Kanak Agarwal,
Dennis Sylvester,
David Blaauw,
Stephen W. Director:
Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance.
DAC 2005: 535-540 |
3 | | Kaviraj Chopra,
Saumil Shah,
Ashish Srivastava,
David Blaauw,
Dennis Sylvester:
Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation.
ICCAD 2005: 1023-1028 |
2 | | Saumil Shah,
Ashish Srivastava,
Dushyant Sharma,
Dennis Sylvester,
David Blaauw,
Vladimir Zolotov:
Discrete Vt assignment and gate sizing using a self-snapping continuous formulation.
ICCAD 2005: 705-712 |
2004 |
1 | EE | Saumil Shah,
Kanak Agarwal,
Dennis Sylvester:
A New Threshold Voltage Assignment Scheme for Runtime Leakage Reduction in On-Chip Repeaters.
ICCD 2004: 138-143 |