| 2007 |
|---|
| 7 | EE | Anand Ramalingam,
Giri Devarayanadurg,
David Z. Pan:
Accurate power grid analysis with behavioral transistor network modeling.
ISPD 2007: 43-50 |
| 2001 |
|---|
| 6 | EE | Mani Soma,
Sam D. Huynh,
Jinyan Zhang,
Seongwon Kim,
Giri Devarayanadurg:
Hierarchical ATPG for Analog Circuits and Systems.
IEEE Design & Test of Computers 18(1): 72-81 (2001) |
| 1999 |
|---|
| 5 | EE | Sam D. Huynh,
Jinyan Zhang,
Seongwon Kim,
Giri Devarayanadurg,
Mani Soma:
Efficient Test Set Design for Analog and Mixed-Signal Circuits and Systems.
Asian Test Symposium 1999: 239- |
| 4 | EE | Giri Devarayanadurg,
Mani Soma,
Prashant Goteti,
Sam D. Huynh:
Test set selection for structural faults in analog IC's.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(7): 1026-1039 (1999) |
| 1996 |
|---|
| 3 | | Giri Devarayanadurg,
Prashant Goteti,
Mani Soma:
Hierarchy Based Statistical Fault Simulation of Mixed-Signal ICs.
ITC 1996: 521-527 |
| 1995 |
|---|
| 2 | EE | Giri Devarayanadurg,
Mani Soma:
Dynamic test signal design for analog ICs.
ICCAD 1995: 627-630 |
| 1994 |
|---|
| 1 | EE | Giri Devarayanadurg,
Mani Soma:
Analytical fault modeling and static test generation for analog ICs.
ICCAD 1994: 44-47 |
