| 2008 |
|---|
| 7 | EE | Deepak Mathaikutty,
Sreekumar V. Kodakara,
Ajit Dingankar,
Sandeep K. Shukla,
David J. Lilja:
MMV: A Metamodeling Based Microprocessor Validation Environment.
IEEE Trans. VLSI Syst. 16(4): 339-352 (2008) |
| 2007 |
|---|
| 6 | EE | Deepak Mathaikutty,
Sandeep K. Shukla,
Sreekumar V. Kodakara,
David J. Lilja,
Ajit Dingankar:
Design fault directed test generation for microprocessor validation.
DATE 2007: 761-766 |
| 5 | EE | Sreekumar V. Kodakara,
Deepak Mathaikutty,
Ajit Dingankar,
Sandeep K. Shukla,
David J. Lilja:
Model Based Test Generation for Microprocessor Architecture Validation.
VLSI Design 2007: 465-472 |
| 4 | EE | Sreekumar V. Kodakara,
Jinpyo Kim,
David J. Lilja,
Douglas M. Hawkins,
Wei-Chung Hsu,
Pen-Chung Yew:
CIM: A Reliable Metric for Evaluating Program Phase Classifications.
Computer Architecture Letters 6(1): 9-12 (2007) |
| 2006 |
|---|
| 3 | EE | Anand Ramalingam,
Sreekumar V. Kodakara,
Anirudh Devgan,
David Z. Pan:
Robust analytical gate delay modeling for low voltage circuits.
ASP-DAC 2006: 61-66 |
| 2005 |
|---|
| 2 | EE | Joshua J. Yi,
Sreekumar V. Kodakara,
Resit Sendag,
David J. Lilja,
Douglas M. Hawkins:
Characterizing and Comparing Prevailing Simulation Techniques.
HPCA 2005: 266-277 |
| 1 | EE | Jinpyo Kim,
Sreekumar V. Kodakara,
Wei-Chung Hsu,
David J. Lilja,
Pen-Chung Yew:
Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations.
HiPEAC 2005: 203-217 |
