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Adelmo Ortiz-Conde

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2006
6EEF. J. García Sánchez, Adelmo Ortiz-Conde, J. Muci: Understanding threshold voltage in undoped-body MOSFETs: An appraisal of various criteria. Microelectronics Reliability 46(5-6): 731-742 (2006)
2002
5EEXiaofang Gao, Juin J. Liou, Joe Bernier, Gregg Croft, Adelmo Ortiz-Conde: Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications. IEEE Trans. on CAD of Integrated Circuits and Systems 21(12): 1497-1502 (2002)
4EERodolfo Quintero, Antonio Cerdeira, Adelmo Ortiz-Conde: Quasi-three-dimensional spice-based simulation of the transient behavior, including plasma spread, of thyristors and over-voltage protectors. Microelectronics Reliability 42(1): 67-76 (2002)
3EEJuin J. Liou, R. Shireen, Adelmo Ortiz-Conde, F. J. García Sánchez, Antonio Cerdeira, Xiaofang Gao, Xuecheng Zou, C. S. Ho: Influence of polysilicon-gate depletion on the subthreshold behavior of submicron MOSFETs. Microelectronics Reliability 42(3): 343-347 (2002)
2EEAdelmo Ortiz-Conde, F. J. García Sánchez, Juin J. Liou, Antonio Cerdeira, Magali Estrada, Y. Yue: A review of recent MOSFET threshold voltage extraction methods. Microelectronics Reliability 42(4-5): 583-596 (2002)
2001
1EEMagali Estrada, Antonio Cerdeira, Adelmo Ortiz-Conde, Francisco García: Determination of trap cross-section in a-Si: H p-i-n diodes parameters using simulation and parameter extraction. Microelectronics Reliability 41(4): 605-610 (2001)

Coauthor Index

1Joe Bernier [5]
2Antonio Cerdeira [1] [2] [3] [4]
3Gregg Croft [5]
4Magali Estrada [1] [2]
5Xiaofang Gao [3] [5]
6Francisco García [1]
7C. S. Ho [3]
8Juin J. Liou [2] [3] [5]
9J. Muci [6]
10Rodolfo Quintero [4]
11F. J. García Sánchez [2] [3] [6]
12R. Shireen [3]
13Y. Yue [2]
14Xuecheng Zou [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)