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| 2003 | ||
|---|---|---|
| 2 | EE | Xiaofang Gao, Juin J. Liou, Joe Bernier, Gregg Croft, Waisum Wong, Satya Vishwanathan: Optimization of on-chip ESD protection structures for minimal parasitic capacitance. Microelectronics Reliability 43(5): 725-733 (2003) |
| 2002 | ||
| 1 | EE | Xiaofang Gao, Juin J. Liou, Joe Bernier, Gregg Croft, Adelmo Ortiz-Conde: Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications. IEEE Trans. on CAD of Integrated Circuits and Systems 21(12): 1497-1502 (2002) |
| 1 | Gregg Croft | [1] [2] |
| 2 | Xiaofang Gao | [1] [2] |
| 3 | Juin J. Liou | [1] [2] |
| 4 | Adelmo Ortiz-Conde | [1] |
| 5 | Satya Vishwanathan | [2] |
| 6 | Waisum Wong | [2] |