2004 | ||
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1 | EE | Jason Helge Anderson, Sudip Nag, Kamal Chaudhary, Sandor Kalman, Chari Madabhushi, Paul Cheng: Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis. FPL 2004: 168-178 |
1 | Jason Helge Anderson | [1] |
2 | Kamal Chaudhary | [1] |
3 | Sandor Kalman | [1] |
4 | Chari Madabhushi | [1] |
5 | Sudip Nag | [1] |