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| 2002 | ||
|---|---|---|
| 2 | EE | T. Devoivre, M. Lunenborg, C. Julien, J.-P. Carrere, P. Ferreira, W. J. Toren, A. VandeGoor, P. Gayet, T. Berger, O. Hinsinger, P. Vannier, Y. Trouiller, Y. Rody, P.-J. Goirand, R. Palla, I. Thomas, F. Guyader, D. Roy, B. Borot, N. Planes, S. Naudet, F. Pico, D. Duca, F. Lalanne, D. Heslinga, M. Haond: Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC). MTDT 2002: 157-162 |
| 2001 | ||
| 1 | M. Fadlallah, A. Szewczyk, C. Giannakopoulos, B. Cretu, F. Monsieur, T. Devoivre, J. Jomaah, G. Ghibaudo: Low frequency noise and reliability properties pf 0.12 mum CMOS devices with Ta2O5 as gate dielectrics. Microelectronics Reliability 41(9-10): 1361-1366 (2001) | |
| 1 | T. Berger | [2] |
| 2 | B. Borot | [2] |
| 3 | J.-P. Carrere | [2] |
| 4 | B. Cretu | [1] |
| 5 | D. Duca | [2] |
| 6 | M. Fadlallah | [1] |
| 7 | P. Ferreira | [2] |
| 8 | P. Gayet | [2] |
| 9 | G. Ghibaudo | [1] |
| 10 | C. Giannakopoulos | [1] |
| 11 | P.-J. Goirand | [2] |
| 12 | F. Guyader | [2] |
| 13 | M. Haond | [2] |
| 14 | D. Heslinga | [2] |
| 15 | O. Hinsinger | [2] |
| 16 | J. Jomaah | [1] |
| 17 | C. Julien | [2] |
| 18 | F. Lalanne | [2] |
| 19 | M. Lunenborg | [2] |
| 20 | F. Monsieur | [1] |
| 21 | S. Naudet | [2] |
| 22 | R. Palla | [2] |
| 23 | F. Pico | [2] |
| 24 | N. Planes | [2] |
| 25 | Y. Rody | [2] |
| 26 | D. Roy | [2] |
| 27 | A. Szewczyk | [1] |
| 28 | I. Thomas | [2] |
| 29 | W. J. Toren | [2] |
| 30 | Y. Trouiller | [2] |
| 31 | A. VandeGoor | [2] |
| 32 | P. Vannier | [2] |