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| 2002 | ||
|---|---|---|
| 2 | EE | T. Devoivre, M. Lunenborg, C. Julien, J.-P. Carrere, P. Ferreira, W. J. Toren, A. VandeGoor, P. Gayet, T. Berger, O. Hinsinger, P. Vannier, Y. Trouiller, Y. Rody, P.-J. Goirand, R. Palla, I. Thomas, F. Guyader, D. Roy, B. Borot, N. Planes, S. Naudet, F. Pico, D. Duca, F. Lalanne, D. Heslinga, M. Haond: Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC). MTDT 2002: 157-162 |
| 1998 | ||
| 1 | P. Kumar, K. Kothandaraman, P. Ferreira: Scalable and Maximally-Permissive Deadlock Avoidance for FMS. ICRA 1998: 580-585 | |
| 1 | T. Berger | [2] |
| 2 | B. Borot | [2] |
| 3 | J.-P. Carrere | [2] |
| 4 | T. Devoivre | [2] |
| 5 | D. Duca | [2] |
| 6 | P. Gayet | [2] |
| 7 | P.-J. Goirand | [2] |
| 8 | F. Guyader | [2] |
| 9 | M. Haond | [2] |
| 10 | D. Heslinga | [2] |
| 11 | O. Hinsinger | [2] |
| 12 | C. Julien | [2] |
| 13 | K. Kothandaraman | [1] |
| 14 | P. Kumar | [1] |
| 15 | F. Lalanne | [2] |
| 16 | M. Lunenborg | [2] |
| 17 | S. Naudet | [2] |
| 18 | R. Palla | [2] |
| 19 | F. Pico | [2] |
| 20 | N. Planes | [2] |
| 21 | Y. Rody | [2] |
| 22 | D. Roy | [2] |
| 23 | I. Thomas | [2] |
| 24 | W. J. Toren | [2] |
| 25 | Y. Trouiller | [2] |
| 26 | A. VandeGoor | [2] |
| 27 | P. Vannier | [2] |