| 2008 |
|---|
| 49 | EE | Florent Bouchez,
Alain Darte,
Fabrice Rastello:
Advanced conservative and optimistic register coalescing.
CASES 2008: 147-156 |
| 2007 |
|---|
| 48 | EE | Alain Darte,
C. Quinson:
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis.
ASAP 2007: 140-147 |
| 47 | EE | Florent Bouchez,
Alain Darte,
Fabrice Rastello:
On the Complexity of Register Coalescing.
CGO 2007: 102-114 |
| 46 | EE | Florent Bouchez,
Alain Darte,
Fabrice Rastello:
On the complexity of spill everywhere under SSA form.
LCTES 2007: 103-112 |
| 45 | EE | Christophe Alias,
Fabrice Baray,
Alain Darte:
Bee+Cl@k: an implementation of lattice-based array contraction in the source-to-source translator rose.
LCTES 2007: 73-82 |
| 44 | EE | Florent Bouchez,
Alain Darte,
Fabrice Rastello:
On the Complexity of Spill Everywhere under SSA Form
CoRR abs/0710.3642: (2007) |
| 2006 |
|---|
| 43 | EE | Hadda Cherroun,
Alain Darte,
Paul Feautrier:
Scheduling under resource constraints using dis-equations.
DATE 2006: 1067-1072 |
| 42 | EE | Florent Bouchez,
Alain Darte,
Christophe Guillon,
Fabrice Rastello:
Register Allocation: What Does the NP-Completeness Proof of Chaitin et al. Really Prove? Or Revisiting Register Allocation: Why and How.
LCPC 2006: 283-298 |
| 2005 |
|---|
| 41 | EE | Alain Darte,
Steven Derrien,
Tanguy Risset:
Hardware/Software Interface for Multi-Dimensional Processor Arrays.
ASAP 2005: 28-35 |
| 40 | EE | Alain Darte,
Robert Schreiber:
A linear-time algorithm for optimal barrier placement.
PPOPP 2005: 26-35 |
| 39 | EE | Alain Darte,
Robert Schreiber,
Gilles Villard:
Lattice-Based Memory Allocation.
IEEE Trans. Computers 54(10): 1242-1257 (2005) |
| 38 | EE | Alain Darte,
Guillaume Huard:
New Complexity Results on Array Contraction and Related Problems.
VLSI Signal Processing 40(1): 35-55 (2005) |
| 2003 |
|---|
| 37 | EE | Alain Darte,
Robert Schreiber,
Gilles Villard:
Lattice-based memory allocation.
CASES 2003: 298-308 |
| 36 | EE | Alain Darte,
John M. Mellor-Crummey,
Robert J. Fowler,
Daniel G. Chavarría-Miranda:
Generalized multipartitioning of multi-dimensional arrays for parallelizing line-sweep computations.
J. Parallel Distrib. Comput. 63(9): 887-911 (2003) |
| 2002 |
|---|
| 35 | EE | Alain Darte,
Guillaume Huard:
New Results on Array Contraction.
ASAP 2002: 359-370 |
| 34 | EE | Daniel G. Chavarría-Miranda,
Alain Darte,
Robert J. Fowler,
John M. Mellor-Crummey:
Generalized Multipartitioning for Multi-Dimensional Arrays.
IPDPS 2002 |
| 33 | EE | Alain Darte,
Guillaume Huard:
Complexity of Multi-dimensional Loop Alignment.
STACS 2002: 179-191 |
| 32 | EE | Alain Darte,
Robert Schreiber,
B. Ramakrishna Rau,
Frédéric Vivien:
Constructing and exploiting linear schedules with prescribed parallelism.
ACM Trans. Design Autom. Electr. Syst. 7(1): 159-172 (2002) |
| 2001 |
|---|
| 31 | EE | Alain Darte,
Yves Robert,
Frédéric Vivien:
Loop Parallelization Algorithms.
Compiler Optimizations for Scalable Parallel Systems Languages 2001: 141-172 |
| 2000 |
|---|
| 30 | EE | Alain Darte,
Georges-André Silber:
Temporary Arrays for Distribution of Loops with Control Dependences.
Euro-Par 2000: 357-367 |
| 29 | EE | Alain Darte,
Claude G. Diderich,
Marc Gengler,
Frédéric Vivien:
Scheduling the Computations of a Loop Nest with Respect to a Given Mapping.
Euro-Par 2000: 405-414 |
| 28 | EE | Alain Darte,
Robert Schreiber,
B. Ramakrishna Rau,
Frédéric Vivien:
A Constructive Solution to the Juggling Problem in Processor Array Synthesis.
IPDPS 2000: 815-822 |
| 27 | | Alain Darte,
Guillaume Huard:
Loop Shifting for Loop Compaction.
International Journal of Parallel Programming 28(5): 499-534 (2000) |
| 26 | | Alain Darte:
On the complexity of loop fusion.
Parallel Computing 26(9): 1175-1193 (2000) |
| 1999 |
|---|
| 25 | | Georges-André Silber,
Alain Darte:
the NESTOR Library: A Tool for Implementing FORTRAN Source Transformations.
HPCN Europe 1999: 653-662 |
| 24 | EE | Alain Darte:
On the Complexity of Loop Fusion.
IEEE PACT 1999: 149-157 |
| 23 | EE | Alain Darte,
Guillaume Huard:
Loop Shifting for Loop Compaction.
LCPC 1999: 415-431 |
| 1998 |
|---|
| 22 | EE | Pierre-Yves Calland,
Alain Darte,
Yves Robert:
Circuit Retiming Applied to Decomposed Software Pipelining.
IEEE Trans. Parallel Distrib. Syst. 9(1): 24-35 (1998) |
| 21 | | Pierre-Yves Calland,
Alain Darte,
Yves Robert,
Frédéric Vivien:
On the Removal of Anti- and Output-Dependences.
International Journal of Parallel Programming 26(2): 285-312 (1998) |
| 20 | | Pierre Boulet,
Alain Darte,
Georges-André Silber,
Frédéric Vivien:
Loop Parallelization Algorithms: From Parallelism Extraction to Code Generation.
Parallel Computing 24(3-4): 421-444 (1998) |
| 1997 |
|---|
| 19 | EE | Alain Darte,
Frédéric Vivien:
On the Optimality of Allen and Kennedy's Algorithm for Parallelism Extraction in Nested Loops.
Parallel Algorithms Appl. 12(1-3): 83-112 (1997) |
| 18 | | Pierre-Yves Calland,
Alain Darte,
Yves Robert,
Frédéric Vivien:
Plugging Anti and Output Dependence Removal Techniques Into Loop Parallelization Algorithm.
Parallel Computing 23(1-2): 251-266 (1997) |
| 17 | | Thomas Brandes,
Serge Chaumette,
Marie Christine Counilh,
Jean Roman,
Alain Darte,
Frederic Desprez,
J. C. Mignot:
HPFIT: A Set of Integrated Tools for the Parallelization of Applications Using High Performance Fortran. PART I: HPFIT and the TransTOOL Environment.
Parallel Computing 23(1-2): 71-87 (1997) |
| 16 | | Alain Darte,
Frédéric Vivien:
Parallelizing Nested Loops with Approximations of Distance Vectors: A Survey.
Parallel Processing Letters 7(2): 133-144 (1997) |
| 15 | | Alain Darte,
Georges-André Silber,
Frédéric Vivien:
Combining Retiming and Scheduling Techniques for Loop Parallelization and Loop Tiling.
Parallel Processing Letters 7(4): 379-392 (1997) |
| 1996 |
|---|
| 14 | | Guy-René Perrin,
Alain Darte:
The Data Parallel Programming Model: Foundations, HPF Realization, and Scientific Applications
Springer 1996 |
| 13 | EE | Pierre-Yves Calland,
Alain Darte,
Yves Robert,
Frédéric Vivien:
On the Removal of Anti and Output Dependences.
ASAP 1996: 353-364 |
| 12 | | Alain Darte,
Frédéric Vivien:
On the Optimality of Allen and Kennedy's Algorithm for Parallel Extraction in Nested Loops.
Euro-Par, Vol. I 1996: 379-388 |
| 11 | EE | Pierre-Yves Calland,
Alain Darte,
Yves Robert:
A New Guaranteed Heuristic for the Software Pipelining Problem.
International Conference on Supercomputing 1996: 261-269 |
| 1995 |
|---|
| 10 | EE | Alain Darte,
Frédéric Vivien:
Revisiting the Decomposition of Karp, Miller and Winograd.
ASAP 1995: 13-25 |
| 9 | | Alain Darte,
Yves Robert:
Affine-by-Statement Scheduling of Uniform and Affine Loop Nests over Parametric.
J. Parallel Distrib. Comput. 29(1): 43-59 (1995) |
| 8 | | Alain Darte,
Frédéric Vivien:
Revisiting the Decomposition of Karp, Miller and Winograd.
Parallel Processing Letters 5: 551-562 (1995) |
| 1994 |
|---|
| 7 | | Vincent Bouchitté,
Pierre Boulet,
Alain Darte,
Yves Robert:
Evaluating Array Expressions on Massively Parallel Machines with Communication/ Computation Overlap.
CONPAR 1994: 713-724 |
| 6 | EE | Alain Darte,
Yves Robert:
Constructive Methods for Scheduling Uniform Loop Nests.
IEEE Trans. Parallel Distrib. Syst. 5(8): 814-822 (1994) |
| 5 | | Alain Darte,
Yves Robert:
Mapping Uniform Loop Nests Onto Distributed Memory Architectures.
Parallel Computing 20(5): 679-710 (1994) |
| 4 | | Alain Darte,
Yves Robert:
On the Alignment Problem.
Parallel Processing Letters 4: 259-270 (1994) |
| 1993 |
|---|
| 3 | | Alain Darte:
Mapping Uniform Loop Nests onto Distributed Memory Architectures.
PARCO 1993: 287-294 |
| 1991 |
|---|
| 2 | | Alain Darte:
Two heuristics for task scheduling.
Algorithms and Parallel VLSI Architectures 1991: 383- |
| 1 | | Alain Darte,
Leonid Khachiyan,
Yves Robert:
Linear Scheduling Is Nearly Optimal.
Parallel Processing Letters 1: 73-81 (1991) |
