Richard Cliff

2005
4	EE	David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose: The Stratix II logic and routing architecture. FPGA 2005: 14-20
2003
3	EE	David M. Lewis, Vaughn Betz, David Jefferson, Andy Lee, Christopher Lane, Paul Leventis, Sandy Marquardt, Cameron McClintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, Jonathan Rose: The StratixTM routing and logic architecture. FPGA 2003: 12-20
1998
2	EE	David Jefferson, Srinivas Reddy, Christopher Lane, Ninh Ngo, Wanli Chang, Manuel Mijia, Ketan Zaveri, Cameron McClintock, Richard Cliff: A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract). FPGA 1998: 256
1995
1		J. Turner, Richard Cliff, W. Leong, Cameron McClintock, Ninh Ngo, K. Nguyen, C. K. Sung, B. Wang, J. Watson: Migration of a Dual Granularity Globally Interconnected PLD Architecture to a 0.5 µm TLM Process. FPL 1995: 15-20

Coauthor Index

1	Elias Ahmed	[4]
2	Gregg Baeckler	[4]
3	Vaughn Betz	[3] [4]
4	Mark Bourgeault	[4]
5	David Cashman	[4]
6	Wanli Chang	[2]
7	David R. Galloway	[4]
8	Michael Hutton (Michael D. Hutton, Mike Hutton)	[4]
9	David Jefferson	[2] [3]
10	Christopher Lane	[2] [3] [4]
11	Andy Lee	[3] [4]
12	W. Leong	[1]
13	Paul Leventis	[3] [4]
14	David M. Lewis	[3] [4]
15	Sandy Marquardt	[3] [4]
16	Cameron McClintock	[1] [2] [3] [4]
17	Manuel Mijia	[2]
18	Ninh Ngo	[1] [2]
19	K. Nguyen	[1]
20	Ketan Padalia	[4]
21	Bruce Pedersen	[3] [4]
22	Giles Powell	[3] [4]
23	Boris Ratchev	[4]
24	Srinivas Reddy	[2] [3] [4]
25	Jonathan Rose	[3] [4]
26	Jay Schleicher	[4]
27	Kevin Stevens	[4]
28	C. K. Sung	[1]
29	J. Turner	[1]
30	B. Wang	[1]
31	J. Watson	[1]
32	Chris Wysocki	[3]
33	Richard Yuan	[4]
34	Ketan Zaveri	[2]