1998 | ||
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1 | EE | David Jefferson, Srinivas Reddy, Christopher Lane, Ninh Ngo, Wanli Chang, Manuel Mijia, Ketan Zaveri, Cameron McClintock, Richard Cliff: A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract). FPGA 1998: 256 |
1 | Richard Cliff | [1] |
2 | David Jefferson | [1] |
3 | Christopher Lane | [1] |
4 | Cameron McClintock | [1] |
5 | Manuel Mijia | [1] |
6 | Ninh Ngo | [1] |
7 | Srinivas Reddy | [1] |
8 | Ketan Zaveri | [1] |