2002 |
6 | EE | John M. Ludden,
Wolfgang Roesner,
Gerry M. Heiling,
John R. Reysa,
Jonathan R. Jackson,
Bing-Lun Chu,
Michael L. Behm,
Jason Baumgartner,
Richard D. Peterson,
Jamee Abdulhafiz,
William E. Bucy,
John H. Klaus,
Danny J. Klema,
Tien N. Le,
F. Danette Lewis,
Philip E. Milling,
Lawrence A. McConville,
Bradley S. Nelson,
Viresh Paruthi,
Travis W. Pouarz,
Audre D. Romonosky,
Jeff Stuecheli,
Kent D. Thompson,
Dave W. Victor,
Bruce Wile:
Functional verification of the POWER4 microprocessor and POWER4 multiprocessor system.
IBM Journal of Research and Development 46(1): 53-76 (2002) |
2001 |
5 | EE | Füsun Özgüner,
Duane W. Marhefka,
Joanne DeGroat,
Bruce Wile,
Jennifer Stofer,
Lyle Hanrahan:
Teaching Future Verification Engineers: The Forgotten Side of Logic Design.
DAC 2001: 253-255 |
1997 |
4 | EE | Jörg A. Walter,
Jens Leenstra,
Gerhard Döttling,
Bernd Leppla,
Hans-Jürgen Münster,
Kevin W. Kark,
Bruce Wile:
Hierarchical Random Simulation Approach for the Verification of S/390 CMOS Multiprocessors.
DAC 1997: 89-94 |
3 | EE | Bruce Wile,
Michael P. Mullen,
Cara Hanson,
Dean G. Bair,
Kevin M. Lasko,
Patrick J. Duffy,
Edward J. Kaminski Jr.,
Thomas E. Gilbert,
Steven M. Licker,
Robert G. Sheldon,
William D. Wollyung,
William J. Lewis,
Robert J. Adkins:
Functional verification of the CMOS S/390 Parallel Enterprise Server G4 system.
IBM Journal of Research and Development 41(4&5): 549-566 (1997) |
2 | EE | Bruce Wile:
Designer-level verification using TIMEDIAG/GENRAND.
IBM Journal of Research and Development 41(4&5): 581-592 (1997) |
1992 |
1 | | Dennis F. Ackerman,
Mark H. Decker,
Joseph J. Gosselin,
Kevin M. Lasko,
Michael P. Mullen,
Ruth E. Rosa,
Ernest V. Valera,
Bruce Wile:
Simulation of IBM Enterprise System/9000 Models 820 and 900.
IBM Journal of Research and Development 36(4): 751-764 (1992) |