ISPAN 2000:
Dallas / Richardson,
TX,
USA
5th International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN 2000), 7-10 December 2000, Dallas / Richardson, TX, USA.
IEEE Computer Society 2000, ISBN 0-7695-0936-3 BibTeX
@proceedings{DBLP:conf/ispan/2000,
title = {5th International Symposium on Parallel Architectures, Algorithms,
and Networks (I-SPAN 2000), 7-10 December 2000, Dallas / Richardson,
TX, USA},
booktitle = {ISPAN},
publisher = {IEEE Computer Society},
year = {2000},
isbn = {0-7695-0936-3},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Parallel Algorithms
Routing and Communications
Networks 1
Architecture 1
Fault Tolerance
Scheduling
Networks 2
Telecommunications
Routing
- Ioannis Caragiannis, Christos Kaklamanis, Ioannis Vergados:
Greedy Dynamic Hot-Potato Routing on Arrays.
178-185
Electronic Edition (link) BibTeX
- Noboru Tanabe, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Yoshihiro Hamada, Hironori Nakajo, Hideharu Amano:
On-the-fly Sending: A Low Latency High Bandwidth Message Transfer Mechanism.
186-194
Electronic Edition (link) BibTeX
- Carmen Carrión, José A. Gregorio, Ramón Beivide:
Pipelining Router Design Improves Parallel System Performance.
195-201
Electronic Edition (link) BibTeX
Networks 3
Parallel Algorithms
Ad-Hoc Networks
Architecture 2
Broadcasting
Copyright © Sat May 16 23:26:06 2009
by Michael Ley (ley@uni-trier.de)
