| 2007 |
|---|
| 21 | | Toshihiro Uchibayashi,
Bernady O. Apduhan,
Itsujiro Arita:
An Indoor Location-Aware Mobile Navigation Service for the Handicapped and the Elderly.
MoMM 2007: 207-216 |
| 2003 |
|---|
| 20 | EE | Takenori Koushiro,
Toshinori Sato,
Itsujiro Arita:
A trace-level value predictor for Contrail processors.
SIGARCH Computer Architecture News 31(3): 42-47 (2003) |
| 19 | EE | Toshinori Sato,
Itsujiro Arita:
Combining variable latency pipeline with instruction reuse for execution latency reduction.
Systems and Computers in Japan 34(12): 11-21 (2003) |
| 2002 |
|---|
| 18 | EE | Toshinori Sato,
Itsujiro Arita:
Simplifying Instruction Issue Logic in Superscalar Processors.
DSD 2002: 341-346 |
| 17 | EE | Toshinori Sato,
Itsujiro Arita:
Low-Cost Value Predictors Using Frequent Value Locality.
ISHPC 2002: 106-119 |
| 16 | EE | Toshinori Sato,
Itsujiro Arita:
Reducing Energy Consumption via Low-Cost Value Prediction.
PATMOS 2002: 380-389 |
| 15 | | Toshiyuki Yamamoto,
Kou Morita,
Toshinori Sato,
Itsujiro Arita:
The KIT COSMOS Processor: An Application of Multi-Threading for Dynamic Optimization.
PDPTA 2002: 1010-1016 |
| 14 | EE | Koichiro Tanaka,
Itsujiro Arita:
The development and evaluation of SHOKE2000: The PCI-based FPGA card.
Systems and Computers in Japan 33(9): 50-57 (2002) |
| 2001 |
|---|
| 13 | EE | Toshinori Sato,
Itsujiro Arita:
Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse.
Euro-Par 2001: 428-438 |
| 12 | EE | Toshinori Sato,
Akihiko Hamano,
Kiichi Sugitani,
Itsujiro Arita:
Influence of Compiler Optimizations on Value Prediction.
HPCN Europe 2001: 312-321 |
| 11 | EE | Yasushi Shimono,
Bernady O. Apduhan,
Itsujiro Arita,
Yoshimasa Ohnishi:
Evaluating the Performance of a DSM Cluster with Improved Communication Subsystem.
ICOIN 2001: 561-567 |
| 10 | EE | Toshinori Sato,
Itsujiro Arita:
In Search of Efficient Reliable Processor Design.
ICPP 2001: 525-532 |
| 9 | | Toshinori Sato,
Itsujiro Arita:
Tolerating Transient Faults through an Instruction Reissue Mechanism.
ISCA PDCS 2001: 240-247 |
| 8 | EE | Toshinori Sato,
Itsujiro Arita:
Evaluating Low-Cost Fault-Tolerance Mechanism for Microprocessors on Multimedia Applications.
PRDC 2001: 225-232 |
| 2000 |
|---|
| 7 | EE | Toshinori Sato,
Itsujiro Arita:
Partial Resolution in Data Value Predictors.
ICPP 2000: 69-76 |
| 6 | EE | Toshinori Sato,
Itsujiro Arita:
Table size reduction for data value predictors by exploiting narrow width values.
ICS 2000: 196-205 |
| 5 | | Takayuki Hirahara,
Takashi Yamanoue,
Hiroyuki Anzai,
Itsujiro Arita:
Sending an Image to a Large Number of Nodes in Short Time using TCP.
IEEE International Conference on Multimedia and Expo (II) 2000: 987-990 |
| 4 | EE | Toshinori Sato,
Itsujiro Arita:
Comprehensive Evaluation of an Instruction Reissue Mechanism.
ISPAN 2000: 78-87 |
| 3 | | Toshinori Sato,
Itsujiro Arita:
The KIT COSMOS Processor: Introducing CONDOR.
PDPTA 2000 |
| 1999 |
|---|
| 2 | EE | Tatsuya Asazu,
Bernady O. Apduhan,
Itsujiro Arita:
Towards a Portable Cluster Computing Environment Supporting Single System Image.
ICPP Workshops 1999: 488- |
| 1980 |
|---|
| 1 | | Itsujiro Arita:
Intelligent console - A universal user interface of a computer system.
Operating Systems Engineering 1980: 233-250 |
