Yulu Yang

2008
18	EE	Xianfang Tan, Lei Zhang, Shankar Neelkrishnan, Mei Yang, Yingtao Jiang, Yulu Yang: Scalable and fault-tolerant network-on-chip design usingthe quartered recursive diagonal torus topology. ACM Great Lakes Symposium on VLSI 2008: 309-314
17	EE	Yaoting Jiao, Mei Yang, Yingtao Jiang, Yulu Yang, Xiao-chun Yun: Deadlock-Free Multi-Path Routing for Torus-Based NoCs. ITNG 2008: 253-258
16	EE	Shankar Neelkrishnan, Mei Yang, Yingtao Jiang, Lei Zhang, Yulu Yang, Enyue Lu, Xiao-chun Yun: Design and Implementation of a Parameterized NoC Router and its Application to Build PRDT-Based NoCs. ITNG 2008: 259-264
2007
15	EE	Guoqiang Yang, Mei Yang, Yulu Yang, Yingtao Jiang: On the Physicl Layout of PRDT-Based NoCs. ITNG 2007: 729-733
14	EE	Yaoting Jiao, Yulu Yang, Ming He, Mei Yang, Yingtao Jiang: Multi-path Routing for Mesh/Torus-Based NoCs. ITNG 2007: 734-742
13	EE	Xinming Duan, Yulu Yang, Mei Yang, Lei Li, Yingtao Jiang: Topology and Binary Routing Schemes of A PRDT-Based NoC. ITNG 2007: 920-924
2006
12	EE	Yulu Yang, Yang Yu: RDT Properties and Evaluations. ITNG 2006: 239-244
2005
11	EE	Yang Yu, Tao Li, Yulu Yang, Xiaoshe Dong: Fault-Tolerant Routing Algorithm for RDT Structure. ISPAN 2005: 248-255
10	EE	Yang Yu, Yulu Yang: Performance analysis of practical RDT interconnection networks with SINOMP. ISPAN 2005: 516-523
9	EE	Mei Yang, Yingtao Jiang, Tao Li, Yulu Yang: Fault-Tolerant Routing Schemes in RDT(2, 2, 1)/a-Based Interconnection Network for Networks-on-Chip Designs. ISPAN 2005: 52-57
8	EE	Yang Yu, Mei Yang, Yulu Yang, Yingtao Jiang: A RDT-Based Interconnection Network for Scalable Network-on-Chip Designs. ITCC (2) 2005: 723-728
2004
7	EE	Tao Li, Yang Yu, Peng Li, Jingpeng Xu, Xirong Ma, Yulu Yang: Practical Routing and Torus Assignment for RDT. ISPAN 2004: 30-36
2002
6	EE	Tao Liu, Qiuyang Li, Yulu Yang: Advanced Baseline: A New MIN with Fault-Tolerance Characteristic. ISPAN 2002: 275-280
2001
5	EE	Yulu Yang, Akira Funahashi, Akiya Jouraku, Hiroaki Nishi, Hideharu Amano, Toshinori Sueyoshi: Recursive Diagonal Torus: An Interconnection Network for Massively Parallel Computers. IEEE Trans. Parallel Distrib. Syst. 12(7): 701-715 (2001)
2000
4	EE	Guofeng Hou, Yulu Yang: Super Recursive Baselines: A Family of New Interconnection Networks with High Performance/Cost Ratios. ISPAN 2000: 260-265
1999
3	EE	Qin Fan, Yulu Yang, Akira Funahashi, Hideharu Amano: A Torus Assignment for an Interconnection Network Recursive Diagonal Torus. ISPAN 1999: 74-79
1995
2		Tomohiro Kudoh, Hideharu Amano, Takashi Matsumoto, Kei Hiraki, Yulu Yang, Katsunobu Nishimura, Koichi Yoshimura, Yasuhito Fukushima: Hierarchical Bit-Map Directory Schemes on the RDT Interconnection Network for a Massively Parallel Processor JUMP-1. ICPP (1) 1995: 186-193
1993
1		Yulu Yang, Hideharu Amano, Hidetomo Shibamura, Toshinori Sueyoshi: Recursive Diagonal Torus: An Interconnection Network for Massively Parallel Computers. SPDP 1993: 591-595

Coauthor Index

1	Hideharu Amano	[1] [2] [3] [5]
2	Xiaoshe Dong	[11]
3	Xinming Duan	[13]
4	Qin Fan	[3]
5	Yasuhito Fukushima	[2]
6	Akira Funahashi	[3] [5]
7	Ming He	[14]
8	Kei Hiraki	[2]
9	Guofeng Hou	[4]
10	Yingtao Jiang	[8] [9] [13] [14] [15] [16] [17] [18]
11	Yaoting Jiao	[14] [17]
12	Akiya Jouraku	[5]
13	Tomohiro Kudoh	[2]
14	Lei Li	[13]
15	Peng Li	[7]
16	Qiuyang Li	[6]
17	Tao Li	[7] [9] [11]
18	Tao Liu	[6]
19	Enyue Lu	[16]
20	Xirong Ma	[7]
21	Takashi Matsumoto	[2]
22	Shankar Neelkrishnan	[16] [18]
23	Hiroaki Nishi	[5]
24	Katsunobu Nishimura	[2]
25	Hidetomo Shibamura	[1]
26	Toshinori Sueyoshi	[1] [5]
27	Xianfang Tan	[18]
28	Jingpeng Xu	[7]
29	Guoqiang Yang	[15]
30	Mei Yang	[8] [9] [13] [14] [15] [16] [17] [18]
31	Koichi Yoshimura	[2]
32	Yang Yu	[7] [8] [10] [11] [12]
33	Xiao-chun Yun	[16] [17]
34	Lei Zhang	[16] [18]

Colors in the list of coauthors