| 2008 |
|---|
| 44 | | Jan Schröder,
Manfred Schimmler,
Heiko Schröder,
Karsten Tischer:
BMA - Boolean Matrices as Model for Motif Kernels.
BCBGC 2008: 36-41 |
| 43 | | Gerd Pfeiffer,
Manfred Schimmler:
A Specification Methodology for the Optimal Layout of a 2-Stage Interconnect Bus for Massively Parallel Architectures.
CDES 2008: 99-104 |
| 42 | EE | Tim Güneysu,
Christof Paar,
Gerd Pfeiffer,
Manfred Schimmler:
Enhancing COPACOBANA for advanced applications in cryptography and cryptanalysis.
FPL 2008: 675-678 |
| 41 | EE | Jan Schröder,
Lars Wienbrandt,
Gerd Pfeiffer,
Manfred Schimmler:
Massively Parallelized DNA Motif Search on the Reconfigurable Hardware Platform COPACOBANA.
PRIB 2008: 436-447 |
| 2007 |
|---|
| 40 | | Tim Güneysu,
Christof Paar,
Jan Pelzl,
Gerd Pfeiffer,
Manfred Schimmler,
Christian Schleiffer:
Parallel Computing with Low-Cost FPGAs: A Framework for COPACOBANA.
PARCO 2007: 741-748 |
| 2006 |
|---|
| 39 | | Sandeep Kumar,
Christof Paar,
Jan Pelzl,
Gerd Pfeiffer,
Manfred Schimmler:
A Configuration Concept for a Massively Parallel FPGA Architecture.
CDES 2006: 207-212 |
| 38 | EE | Sandeep Kumar,
Christof Paar,
Jan Pelzl,
Gerd Pfeiffer,
Manfred Schimmler:
Breaking Ciphers with COPACOBANA - A Cost-Optimized Parallel Code Breaker.
CHES 2006: 101-118 |
| 37 | EE | Sandeep Kumar,
Christof Paar,
Jan Pelzl,
Gerd Pfeiffer,
Manfred Schimmler:
COPACOBANA A Cost-Optimized Special-Purpose Hardware for Code-Breaking.
FCCM 2006: 311-312 |
| 36 | | Stefan Baumgart,
Begona Toledo,
Karin Spors,
Manfred Schimmler:
PLUG: An Agent Based Prototype Validation of CAD-Constructions.
IKE 2006: 183-190 |
| 2005 |
|---|
| 35 | | Viktor Bunimov,
Manfred Schimmler:
Completely Redundant Modular Exponentiation by Operand Changing.
CDES 2005: 224-232 |
| 34 | | David Narh Amanor,
Viktor Bunimov,
Christof Paar,
Jan Pelzl,
Manfred Schimmler:
Efficient Hardware Architectures for Modular Multiplication on FPGAs.
FPL 2005: 539-542 |
| 33 | | Gerd Pfeiffer,
Heinz Kreft,
Manfred Schimmler:
Hardware Enhanced Biosequence Alignment.
METMBS 2005: 11-17 |
| 2004 |
|---|
| 32 | | Viktor Bunimov,
Manfred Schimmler:
High Radix Modular Multiplication of Large Integers Optimised with Respect to Area and Time.
ESA/VLSI 2004: 427-433 |
| 31 | EE | Manfred Schimmler,
Viktor Bunimov:
Fast Modular Multiplication by Operand Changing.
ITCC (2) 2004: 518-524 |
| 30 | EE | Manfred Schimmler,
Bertil Schmidt,
Hans-Werner Lang:
A bit-serial floating-point unit for a massively parallel system on a chip.
Parallel Algorithms Appl. 19(2-3): 79-95 (2004) |
| 2003 |
|---|
| 29 | EE | Viktor Bunimov,
Manfred Schimmler:
Area and Time Efficient Modular Multiplication of Large Integers.
ASAP 2003: 400- |
| 28 | EE | Viktor Bunimov,
Manfred Schimmler:
Efficient Parallel Multiplication Algorithm for Large Integres.
Euro-Par 2003: 923-928 |
| 27 | | Manfred Schimmler,
Bertil Schmidt,
Hans-Werner Lang:
Design of a Bit-Serial Floating Point Unit for a Fine Grained Parallel Processor Array.
PDPTA 2003: 255-261 |
| 26 | | Viktor Bunimov,
Manfred Schimmler,
Wolfgang Bziuk:
Key Generation for Secure High Speed Communication.
Security and Management 2003: 570-576 |
| 25 | | Manfred Schimmler,
Bertil Schmidt,
Hans-Werner Lang,
Sven Heithecker:
An Area-Efficient Bit-Serial Integer Multiplier.
VLSI 2003: 131-137 |
| 24 | | Manfred Schimmler,
Viktor Bunimov:
A Simple Circuit to Reduce the Search Range for Large Prime Numbers.
VLSI 2003: 285-291 |
| 2002 |
|---|
| 23 | EE | Bertil Schmidt,
Heiko Schröder,
Manfred Schimmler:
Massively Parallel Solutions for Molecular Sequence Analysis.
IPDPS 2002 |
| 22 | EE | Bertil Schmidt,
Heiko Schröder,
Manfred Schimmler:
A hybrid architecture for bioinformatics.
Future Generation Comp. Syst. 18(6): 855-862 (2002) |
| 2001 |
|---|
| 21 | EE | Bertil Schmidt,
Heiko Schröder,
Manfred Schimmler:
Scanning Biosequence Databases on a Hybrid Parallel Architecture.
Euro-Par 2001: 360-370 |
| 20 | EE | Bertil Schmidt,
Heiko Schröder,
Manfred Schimmler:
Protein Sequence Comparison on the Instruction Systolic Array.
PaCT 2001: 498-509 |
| 19 | | Bertil Schmidt,
Heiko Schröder,
Manfred Schimmler:
Tomographic Image Reconstruction on the Instruction Systolic Array.
Computers and Artificial Intelligence 20(1): (2001) |
| 2000 |
|---|
| 18 | EE | Manfred Schimmler:
Architectures and Algorithms for Multimedia Applications.
Euro-Par 2000: 1085 |
| 1999 |
|---|
| 17 | EE | Bertil Schmidt,
Manfred Schimmler:
A Parallel Accelerator Architecture for Multimedia Video Compression.
Euro-Par 1999: 950-960 |
| 16 | | Bertil Schmidt,
Manfred Schimmler,
Heiko Schröder:
A Morphological Approach to Hough Transform on an Instruction Systolic Array.
Computers and Artificial Intelligence 18(6): (1999) |
| 1998 |
|---|
| 15 | EE | Bertil Schmidt,
Manfred Schimmler,
Heiko Schröder:
Long Operand Arithmetic on Instruction Systolic Computer Architectures and Its Application in RSA Cryptography.
Euro-Par 1998: 916-922 |
| 1997 |
|---|
| 14 | | Bertil Schmidt,
Manfred Schimmler,
Heiko Schröder:
Morphological Hough Transform on the Instruction Systolic Array.
Euro-Par 1997: 798-806 |
| 1994 |
|---|
| 13 | | Manfred Schimmler,
Hans-Werner Lang,
Rüdiger Maaß:
The Instruction Systolic Array - Implementation of a Low-Cost Parallel Architecture as Add-On Board for Personal Computers.
HPCN 1994: 487-488 |
| 1991 |
|---|
| 12 | | Michael Phieler,
Manfred Schimmler,
Hartmut Schmeck:
A Reconfigurable Instruction Systolic Array.
Fault-Tolerant Computing Systems 1991: 312-323 |
| 11 | | Manfred Schimmler,
Hartmut Schmeck:
A Fault Tolerant and High Speed Instruction Systolic Array.
VLSI 1991: 471-480 |
| 10 | | Manfred Schimmler:
Parallel strong orientation on a mesh connected computer.
Parallel Computing 17(6-7): 657-664 (1991) |
| 1990 |
|---|
| 9 | | E. V. Krishnamurthy,
Manfred Kunde,
Manfred Schimmler,
Heiko Schröder:
Systolic algorithm for tensor products of matrices: implementation and applications.
Parallel Computing 13(3): 301-308 (1990) |
| 1989 |
|---|
| 8 | | Manfred Schimmler,
Heiko Schröder:
A simple systolic method to find all bridges of an undirected graph.
Parallel Computing 12(1): 107-111 (1989) |
| 7 | | Manfred Schimmler,
Christoph Starke:
A Correction Network for N-Sorters.
SIAM J. Comput. 18(6): 1179-1187 (1989) |
| 1988 |
|---|
| 6 | | Manfred Schimmler,
Christoph Starke:
A Correction Network for N-Sorters.
AWOC 1988: 444-455 |
| 5 | | Manfred Schimmler,
Heiko Schröder:
A Simple Systolic Method to Find all Bridges of an Undirected Graph.
WG 1988: 262-267 |
| 4 | EE | Manfred Kunde,
Hans-Werner Lang,
Manfred Schimmler,
Hartmut Schmeck,
Heiko Schröder:
The instruction systolic array and its relation to other models of parallel computers.
Parallel Computing 7(1): 25-39 (1988) |
| 1985 |
|---|
| 3 | | Hans-Werner Lang,
Manfred Schimmler,
Hartmut Schmeck,
Heiko Schröder:
A Method for Realistic Comparisons of Sorting Algorithms for VLSI.
FODO 1985: 309-316 |
| 2 | | Hans-Werner Lang,
Manfred Schimmler,
Hartmut Schmeck,
Heiko Schröder:
Systolic Sorting on a Mesh-Connected Network.
IEEE Trans. Computers 34(7): 652-658 (1985) |
| 1983 |
|---|
| 1 | | Hans-Werner Lang,
Manfred Schimmler,
Hartmut Schmeck,
Heiko Schröder:
A Fast Sorting Algorithm for VLSI.
ICALP 1983: 408-419 |
