5. Fault-Tolerant Computing Systems 1991: Nürnberg, Germany

Mario Dal Cin, Wolfgang Hohl (Eds.): Fault-Tolerant Computing Systems, Tests, Diagnosis, Fault Treatment, 5th International GI/ITG/GMA Conference, Nürnberg, Germany, September 25-27, 1991, Proceedings. Informatik-Fachberichte 283 Springer 1991, ISBN 3-540-54545-X BibTeX

@proceedings{DBLP:conf/icftcs/1991,
  editor    = {Mario Dal Cin and
               Wolfgang Hohl},
  title     = {Fault-Tolerant Computing Systems, Tests, Diagnosis, Fault Treatment,
               5th International GI/ITG/GMA Conference, N{\"u}rnberg, Germany,
               September 25-27, 1991, Proceedings},
  booktitle = {Fault-Tolerant Computing Systems},
  publisher = {Springer},
  series    = {Informatik-Fachberichte},
  volume    = {283},
  year      = {1991},
  isbn      = {3-540-54545-X},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Keynote Address

Miroslaw Malek: Responsive Systems: A Marriage Betwenn Real time and Fault Tolenrance. 1-17 BibTeX

Reconfiguration and Recovery

Andreas Bauch, Erik Maehle: Self-Diagnosis, Reconfiguration and Recovery in the Dynamical Reconfigurable Multiprocessor Systemn DAMP. 18-29 BibTeX
Klaus Echtle, Arnold Niedermaier: Efficient Recovery of Statically Redundant Systems. 30-41 BibTeX
Felicita Di Giandomenico, Lorenzo Strigini: Implementations and Extensions of the Conversation Concept. 42-53 BibTeX

System Level Diagnosis

Edgar Michel, Wolfgang Hohl: Concurrent Erro Detection Using Watchdog Processors. 54-64 BibTeX
Wojciech E. Kozlowski, Henryk Krawczyk: SEES: Simulation Environment for Dynamic Evaluation. 65-76 BibTeX
Thomas Philipp: An Expert System Shell for the Diagnosis of Parallel Computers. 77-87 BibTeX

Voting and Agreement

Andreas Stopp: Adaptive Fault Tolerance in Multi-Computer Systems Using Data Compation and Two-Level Voting. 88-99 BibTeX
Bernd Freisleben, Hans-Henning Koch, Oliver E. Theel: The Electoral District Strategy of Replicated Data in Distrinuted Systems. 100-111 BibTeX
Birgit Baum-Waidner: Adaptive Byzantine Agreement in O(t) Phases. 112-123 BibTeX

Testing

R. G. Bennetts: Scan Technology at Work. 124-135 BibTeX
Bernhard Eschermann, Hans-Joachim Wunderlich: Emulation of Scan Paths in Sequential Circuit Synthesis. 136-147 BibTeX
Irith Pomeranz, Sudhakar M. Reddy: Testing of Fault-Tolerant Hardware. 148-159 BibTeX

Fault-Tolerant Circuits

M. Bartel: Coding Redundancy for Combinational Switching Circuits. 160-170 BibTeX
Michael Gössel: Optimal Error Detection Circuits for Sequential Circuits with Observable States. 171-180 BibTeX
Stanislaw J. Piestrak: Efficient Encoding? Decoding Circuitry for Systematic Unidirectional Error-Detecting Codes. 181-192 BibTeX

Array Testing

Djamshid Tavangarian, Chr. Elm: Acceleration of RAM-Tests with Associative Pattern Recognition Methods. 193-204 BibTeX
Vlad. Hert, A. J. van de Goor: Truth Table Verification for one-Dimensional CMOS ILA's. 205-216 BibTeX
Ben Soh, Tharam S. Dillon: On Modelling and Analysis of Latency Problem in Fault-Tolerant Systems. 217-228 BibTeX
Lorrie A. Tomek, Kishor S. Trivedi: Fixed Point Iteration in Availability Modeling. 229-240 BibTeX
Yennun Huang, Satish K. Tripathi: Resource Allocation for Distributed Systems with Fault Tolerant Nodes. 241-252 BibTeX
Roland Lepold: Performability Evaluation of a Fault-Tolerant Multiprocessor Architecture Using Stochastic Petri Nets. 253-265 BibTeX

Applied Fault Tolerance

H. D. Fischer: Special Features of a Computer-Based German Reactor Protection System. 266-288 BibTeX
Herbert Barthel: Fault-Tolerant Process Interface with Programmable Controllers. 289-299 BibTeX
Kumar K. Goswami, Ravishankar K. Iyer: A Simulation-Based Study of a Triple Modular Redundant System Using DEFEND. 300-311 BibTeX

Fault-Tolerant Arrays Systems

Michael Phieler, Manfred Schimmler, Hartmut Schmeck: A Reconfigurable Instruction Systolic Array. 312-323 BibTeX
Peter Poechmueller, Manfred Glesner: A New Approach for Designing Fault-Tolerant Array Processors. 324-331 BibTeX
Andrea Bondavalli, M. Mannocci, F. Tarini, P. Zini, L. Nardone, Luca Simoncini: A Performable BSM Architecture. 332-347 BibTeX

Interconnection Networks

Markus Siegle, Douglas S. Reeves, Krzysztof Kozminski: The Interlocking Bus Network for Fault-Tolerant Processor Arrays. 348-359 BibTeX
U. Hildebrand: A Fault Tolerant Interconnection Network for Memory-Coupled Multiprocessor Systems. 360-371 BibTeX
Winfrid G. Schneeweiss, F. P. Holtmann: Star Type Networks with Fault Tolerance. 372-382 BibTeX

Fault-Tolerant Software

Francesca Saglietti: A Classification of Software Diversity Degrees Induced by an Analysis of Fault Types to be Tolerated. 383-395 BibTeX
Ramesh K. Sitaraman, Niraj K. Jha: Optimal Design of Checks for Error Detection and Location in Fault Tolerant Multiprocessors Systems. 396-406 BibTeX
Yinong Chen, Klaus Echtle, Winfried Görke: Testing Fault-Tolerant Protocols by Heristic Fault Injection. 407-418 BibTeX

Appendix: Industrial Presentation

M. Becker, Friedrich Lücking: A Practical Approach for a Fault-Tolerant Massively Paralle Computer. 419-424 BibTeX