2004 |
9 | EE | Manfred Schimmler,
Bertil Schmidt,
Hans-Werner Lang:
A bit-serial floating-point unit for a massively parallel system on a chip.
Parallel Algorithms Appl. 19(2-3): 79-95 (2004) |
2003 |
8 | | Hans-Werner Lang:
Algorithmen in Java
Oldenbourg 2003 |
7 | | Manfred Schimmler,
Bertil Schmidt,
Hans-Werner Lang:
Design of a Bit-Serial Floating Point Unit for a Fine Grained Parallel Processor Array.
PDPTA 2003: 255-261 |
6 | | Manfred Schimmler,
Bertil Schmidt,
Hans-Werner Lang,
Sven Heithecker:
An Area-Efficient Bit-Serial Integer Multiplier.
VLSI 2003: 131-137 |
1994 |
5 | | Manfred Schimmler,
Hans-Werner Lang,
Rüdiger Maaß:
The Instruction Systolic Array - Implementation of a Low-Cost Parallel Architecture as Add-On Board for Personal Computers.
HPCN 1994: 487-488 |
1988 |
4 | EE | Manfred Kunde,
Hans-Werner Lang,
Manfred Schimmler,
Hartmut Schmeck,
Heiko Schröder:
The instruction systolic array and its relation to other models of parallel computers.
Parallel Computing 7(1): 25-39 (1988) |
1985 |
3 | | Hans-Werner Lang,
Manfred Schimmler,
Hartmut Schmeck,
Heiko Schröder:
A Method for Realistic Comparisons of Sorting Algorithms for VLSI.
FODO 1985: 309-316 |
2 | | Hans-Werner Lang,
Manfred Schimmler,
Hartmut Schmeck,
Heiko Schröder:
Systolic Sorting on a Mesh-Connected Network.
IEEE Trans. Computers 34(7): 652-658 (1985) |
1983 |
1 | | Hans-Werner Lang,
Manfred Schimmler,
Hartmut Schmeck,
Heiko Schröder:
A Fast Sorting Algorithm for VLSI.
ICALP 1983: 408-419 |