| 2009 |
|---|
| 11 | EE | Lide Duan,
Bin Li,
Lu Peng:
Versatile prediction and fast estimation of Architectural Vulnerability Factor from processor performance metrics.
HPCA 2009: 129-140 |
| 2008 |
|---|
| 10 | EE | Bin Li,
Lu Peng,
Balachandran Ramadass:
Efficient mart-aided modeling for microarchitecture design space exploration and performance prediction.
SIGMETRICS 2008: 439-440 |
| 9 | EE | Lu Peng,
Jih-Kwon Peir,
Tribuvan K. Prakash,
Carl Staelin,
Yen-Kuang Chen,
David M. Koppelman:
Memory hierarchy performance measurement of commercial dual-core desktop processors.
Journal of Systems Architecture - Embedded Systems Design 54(8): 816-828 (2008) |
| 2007 |
|---|
| 8 | EE | Lu Peng,
Wencheng Lu,
Lide Duan:
Power Efficient IP Lookup with Supernode Caching.
GLOBECOM 2007: 215-219 |
| 7 | EE | Lu Peng,
Jih-Kwon Peir,
Tribuvan K. Prakash,
Yen-Kuang Chen,
David M. Koppelman:
Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study.
IPCCC 2007: 55-64 |
| 2006 |
|---|
| 6 | EE | Li Yang,
Lu Peng:
SecCMP: a secure chip-multiprocessor architecture.
ASID 2006: 72-76 |
| 5 | EE | Xudong Shi,
Zhen Yang,
Jih-Kwon Peir,
Lu Peng,
Yen-Kuang Chen,
V. Lee,
B. Liang:
Coterminous locality and coterminous group data prefetching on chip-multiprocessors.
IPDPS 2006 |
| 2004 |
|---|
| 4 | EE | Lu Peng,
Jih-Kwon Peir,
Konrad Lai:
Signature Buffer: Bridging Performance Gap between Registers and Caches.
HPCA 2004: 164-175 |
| 2003 |
|---|
| 3 | EE | Lu Peng,
Jih-Kwon Peir,
Qianrong Ma,
Konrad Lai:
Address-free memory access based on program syntax correlation of loads and stores.
IEEE Trans. VLSI Syst. 11(3): 314-324 (2003) |
| 2001 |
|---|
| 2 | | Qianrong Ma,
Jih-Kwon Peir,
Lu Peng,
Konrad Lai:
Symbolic Cache: Fast Memory Access Based on Program Syntax Correlation of Loads and Stores.
ICCD 2001: 54-61 |
| 1999 |
|---|
| 1 | EE | Qiuming Zhu,
Lu Peng:
A new approach to conic section approximation of object boundaries.
Image Vision Comput. 17(9): 645-658 (1999) |
