| |
| 2002 | ||
|---|---|---|
| 2 | EE | Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pin Su, Cheng-Wen Wu, Chuang Cheng, Shao-I Chen, Chi-Yi Hwang, Hsiao-Ping Lin: A Hierarchical Test Scheme for System-On-Chip Designs. DATE 2002: 486-490 |
| 1 | EE | Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pin Su, Cheng-Wen Wu, Chuang Cheng, Shao-I Chen, Chi-Yi Hwang, Hsiao-Ping Lin: A Hierarchical Test Methodology for Systems on Chip. IEEE Micro 22(5): 69-81 (2002) |
| 1 | Jeng-Bin Chen | [1] [2] |
| 2 | Chuang Cheng | [1] [2] |
| 3 | Hsin-Jung Huang | [1] [2] |
| 4 | Chi-Yi Hwang | [1] [2] |
| 5 | Jin-Fu Li | [1] [2] |
| 6 | Hsiao-Ping Lin | [1] [2] |
| 7 | Chih-Pin Su | [1] [2] |
| 8 | Cheng-Wen Wu | [1] [2] |