Michael Herz

2000
18	EE	Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger: KressArray Xplorer: a new CAD environment to optimize reconfigurable datapath array. ASP-DAC 2000: 163-168
17	EE	Michael Herz: Agilent's Key Technologies in Remote System Management. CLUSTER 2000: 135-136
16	EE	Michael Herz: Remote System Management Principles. CLUSTER 2000: 137-138
15	EE	Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger: Synthesis and domain-specific optimization of KressArray-based reconfigurable computing engines (poster abstract). FPGA 2000: 222
14	EE	Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger: Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures. FPL 2000: 389-399
1999
13		Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger, Thomas Hoffmann: An Internet Based Development Framework for Reconfigurable Computing. FPL 1999: 155-164
12		Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger: Mapping Applications onto Reconfigurable Kress Arrays. FPL 1999: 385-390
11	EE	Michael Herz, Thomas Hoffmann, Ulrich Nageldinger, Christian Schreiber: Interfacing the MoM-PDA to an Internet-based Development System. HICSS 1999
10	EE	Michael Herz, Thomas Hoffmann, Ulrich Nageldinger, Christian Schreiber: XMDS: The Xputer Multimedia Development System. HICSS 1999
1998
9		Jürgen Becker, Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger: Parallelization in Co-Compilation for Configurable Accelerators. ASP-DAC 1998: 23-33
8	EE	Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger: Exploiting Contemporary Memory Techniques in Reconfigurable Accelerators. FPL 1998: 189-198
7	EE	Reiner W. Hartenstein, Michael Herz, Frank Gilbert: Designing for Xilinx XC6200 FPGAs. FPL 1998: 29-38
6		Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger: On Reconfigurable Co-processing Units. IPPS/SPDP Workshops 1998: 67-72
1997
5		Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger: A Novel Universal Sequencer Hardware. ARCS 1997: 143-152
4	EE	Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger: A Novel Sequencer Hardware for Application Specific Computing. ASAP 1997: 392-401
3		Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger: Data scheduling to increase performance of parallel accelerators. FPL 1997: 294-303
1996
2	EE	Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Rainer Kress, Ulrich Nageldinger: A Synthesis System For Bus-Based Wavefront Array Architectures. ASAP 1996: 274-283
1	EE	Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Rainer Kress, Ulrich Nageldinger: A Partitioning Programming Environment for a Novel Parallel Architecture. IPPS 1996: 544-548

Coauthor Index

1	Jürgen Becker	[1] [2] [3] [4] [5] [9]
2	Frank Gilbert	[7]
3	Reiner W. Hartenstein	[1] [2] [3] [4] [5] [6] [7] [8] [9] [12] [13] [14] [15] [18]
4	Thomas Hoffmann	[6] [8] [10] [11] [12] [13] [14] [15] [18]
5	Rainer Kress	[1] [2]
6	Ulrich Nageldinger	[1] [2] [3] [4] [5] [6] [8] [9] [10] [11] [12] [13] [14] [15] [18]
7	Christian Schreiber	[10] [11]