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Helmut Reinig

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2008
7EESören Sonntag, Helmut Reinig: An Efficient Weighted-Round-Robin Algorithm for Multiprocessor Architectures. Annual Simulation Symposium 2008: 193-199
1996
6EEReiner W. Hartenstein, Jürgen Becker, Rainer Kress, Helmut Reinig: CoDe-C: A Novel Two-Level Hardware/Software Co-Design Framework. VLSI Design 1996: 81-84
5 Reiner W. Hartenstein, Jürgen Becker, Rainer Kress, Helmut Reinig: High-performance computing using a reconfigurable accelerator. Concurrency - Practice and Experience 8(6): 429-443 (1996)
1995
4EEReiner W. Hartenstein, Jürgen Becker, Rainer Kress, Helmut Reinig, Karin Schmidt: A Parallelizing Compilation Method for the Map-oriented Machine. ASAP 1995: 129-132
1994
3 Reiner W. Hartenstein, Rainer Kress, Helmut Reinig: A New FPGA Architecture for Word-Oriented Datapaths. FPL 1994: 144-155
2 Andreas Ast, Jürgen Becker, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt: Data-Procedural Languages for FPL-based Machines. FPL 1994: 183-195
1992
1 Andreas Ast, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt: Novel High Performance Machine Paradigms and Fast- Turnaround ASIC Design Methods. FPL 1992: 211-217

Coauthor Index

1Andreas Ast [1] [2]
2Jürgen Becker [2] [4] [5] [6]
3Reiner W. Hartenstein [1] [2] [3] [4] [5] [6]
4Rainer Kress [1] [2] [3] [4] [5] [6]
5Karin Schmidt [1] [2] [4]
6Sören Sonntag [7]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)