| 2008 |
|---|
| 46 | EE | Hyun-Kyu Jeon,
Hye-Ran Kim,
Jung-Min Choi,
Ju-Pyo Hong,
Yong-Suk Kim,
Hyung-Seog Oh,
Dae-Keun Han,
Lee-Sup Kim:
High speed serial interface for mobile LCD driver IC.
ISCAS 2008: 157-160 |
| 45 | EE | Jeong-Hyun Kim,
Kyusik Chung,
Young-Jun Kim,
Seok-Hoon Kim,
Lee-Sup Kim:
Clipping-ratio-independent 3D graphics clipping engine by dual-thread algorithm.
ISCAS 2008: 3534-3537 |
| 44 | EE | Donghyun Kim,
Lee-Sup Kim:
Area-efficient pixel rasterization and texture coordinate interpolation.
Computers & Graphics 32(6): 669-681 (2008) |
| 43 | EE | Jong-Sun Kim,
Lee-Sup Kim:
Noise Robust Motion Refinement for Motion Compensated Noise Reduction.
IEICE Transactions 91-D(5): 1581-1583 (2008) |
| 2007 |
|---|
| 42 | EE | Jae-Sung Yoon,
Chang-Hyo Yu,
Donghyun Kim,
Lee-Sup Kim:
Triangle-Level Depth Filter Method for Bandwidth Reduction in 3D Graphics Hardware.
ISCAS 2007: 765-768 |
| 41 | EE | Jong-Sun Kim,
Lee-Sup Kim:
Binary Motion Estimation with Hybrid Distortion Measure.
IEICE Transactions 90-D(9): 1474-1477 (2007) |
| 2006 |
|---|
| 40 | EE | Ju-Pyo Hong,
Kyung-Soo Ha,
Lee-Sup Kim:
A 0.18µm CMOS 10Gb/s 1: 4 DEMUX using replica-bias circuits for optical receiver.
ISCAS 2006 |
| 39 | EE | Kwang-Il Oh,
Seunghyun Cho,
Lee-Sup Kim:
A low power SoC bus with low-leakage and low-swing technique.
ISCAS 2006 |
| 38 | EE | Seunghyun Cho,
Chang-Hyo Yu,
Lee-Sup Kim:
An efficient texture cache for programmable vertex shaders.
ISCAS 2006 |
| 37 | EE | Kyung-Soo Ha,
Lee-Sup Kim:
Charge-pump reducing current mismatch in DLLs and PLLs.
ISCAS 2006 |
| 36 | EE | Kyusik Chung,
Chang-Hyo Yu,
Lee-Sup Kim:
Vertex cache of programmable geometry processor for mobile multimedia application.
ISCAS 2006 |
| 35 | EE | Hyunchul Shin,
Jin-Aeon Lee,
Lee-Sup Kim:
A cost-effective VLSI architecture for anisotropic texture filtering in limited memory bandwidth.
IEEE Trans. VLSI Syst. 14(3): 254-267 (2006) |
| 34 | EE | Byung-Do Yang,
Lee-Sup Kim:
A low-power ROM using single charge-sharing capacitor and hierarchical bit line.
IEEE Trans. VLSI Syst. 14(4): 313-322 (2006) |
| 2005 |
|---|
| 33 | EE | Kyusik Chung,
Donghyun Kim,
Lee-Sup Kim:
A 3-way SIMD engine for programmable triangle setup in embedded 3D graphics hardware.
ISCAS (5) 2005: 4546-4549 |
| 32 | EE | Jaewan Bae,
Donghyun Kim,
Lee-Sup Kim:
An 11M-triangles/sec 3D graphics clipping engine for triangle primitives.
ISCAS (5) 2005: 4570-4573 |
| 31 | EE | Chang-Hyo Yu,
Donghyun Kim,
Lee-Sup Kim:
A 33.2M vertices/sec programmable geometry engine for multimedia embedded systems.
ISCAS (5) 2005: 4574-4577 |
| 30 | EE | Chang-Young Han,
Yeon-Ho Im,
Lee-Sup Kim:
Geometry engine architecture with early backface culling hardware.
Computers & Graphics 29(3): 415-425 (2005) |
| 29 | EE | Yeon-Ho Im,
Chang-Young Han,
Lee-Sup Kim:
A Method to Generate Soft Shadows Using a Layered Depth Image and Warping.
IEEE Trans. Vis. Comput. Graph. 11(3): 265-272 (2005) |
| 28 | EE | Joung-Youn Kim,
Lee-Sup Kim:
An Efficient Memory Address Converter for Soc-based 3d Graphics System.
Journal of Circuits, Systems, and Computers 14(4): 861-876 (2005) |
| 2004 |
|---|
| 27 | EE | Chun-Ho Kim,
Lee-Sup Kim:
Adaptive Selection of an Index in a Texture Cache.
ICCD 2004: 295-300 |
| 26 | | Chang-Hyo Yu,
Lee-Sup Kim:
An adaptive spatial filter for early depth test.
ISCAS (2) 2004: 137-140 |
| 25 | | Donghyun Kim,
Lee-Sup Kim:
Division-free rasterizer for perspective-correct texture filtering.
ISCAS (2) 2004: 153-156 |
| 24 | | Byung-Do Yang,
Lee-Sup Kim:
An error pattern ROM compression method for continuous data.
ISCAS (2) 2004: 845-848 |
| 23 | | Kwang-Il Oh,
Lee-Sup Kim:
A high performance low power dynamic PLA with conditional evaluation scheme.
ISCAS (2) 2004: 881-884 |
| 22 | EE | Donghyun Kim,
Lee-Sup Kim:
An Efficient Fragment Processing Technique in A-Buffer Implementation.
IEICE Transactions 87-A(1): 258-269 (2004) |
| 2003 |
|---|
| 21 | EE | Inho Lee,
Joung-Youn Kim,
Yeon-Ho Im,
Yunseok Choi,
Hyunchul Shin,
Chang-Young Han,
Donghyun Kim,
Hyoungjoon Park,
Young-Il Seo,
Kyusik Chung,
Chang-Hyo Yu,
Kanghyup Chun,
Lee-Sup Kim:
A hardware-like high-level language based environment for 3D graphics architecture exploration.
ISCAS (2) 2003: 512-515 |
| 20 | EE | Chang-Hyo Yu,
Lee-Sup Kim:
A hierarchical depth buffer for minimizing memory bandwidth in 3D rendering engine: Depth Filter.
ISCAS (2) 2003: 724-727 |
| 19 | EE | Kyusik Chung,
Lee-Sup Kim:
A PN triangle generation unit for fast and simple tessellation hardware.
ISCAS (2) 2003: 728-731 |
| 18 | EE | Byung-Do Yang,
Lee-Sup Kim:
A low power charge sharing ROM using dummy bit lines.
ISCAS (5) 2003: 377-380 |
| 17 | EE | Kwang-Il Oh,
Lee-Sup Kim:
A clock delayed sleep mode domino logic for wide dynamic OR gate.
ISLPED 2003: 176-179 |
| 16 | | Chun-Ho Kim,
Si-Mun Seong,
Jin-Aeon Lee,
Lee-Sup Kim:
Winscale: an image-scaling algorithm using an area pixel model.
IEEE Trans. Circuits Syst. Video Techn. 13(6): 549-553 (2003) |
| 15 | EE | Byung-Do Yang,
Lee-Sup Kim:
A low-power charge-recycling ROM architecture.
IEEE Trans. VLSI Syst. 11(4): 590-600 (2003) |
| 2002 |
|---|
| 14 | EE | Youngjoon Kim,
Ki-Hyuk Sung,
Lee-Sup Kim:
A 1.67 GHz 32-bit pipelined carry-select adder using the complementary scheme.
ISCAS (1) 2002: 461-464 |
| 13 | EE | Byung-Do Yang,
Lee-Sup Kim,
Hyun-Kyu Yu:
A high speed direct digital frequency synthesizer using a low power pipelined parallel accumulator.
ISCAS (5) 2002: 373-376 |
| 2001 |
|---|
| 12 | EE | Hyeon-Cheol Mo,
Jong-Sun Kim,
Lee-Sup Kim:
A high-speed pattern decoder in MPEG-4 padding block hardware accelerator.
ISCAS (2) 2001: 197-200 |
| 11 | EE | Youngjoon Kim,
Lee-Sup Kim:
A low power carry select adder with reduced area.
ISCAS (4) 2001: 218-221 |
| 10 | EE | Byung-Do Yang,
Lee-Sup Kim:
A low power charge-recycling ROM architecture.
ISCAS (4) 2001: 510-513 |
| 9 | EE | Sunho Chang,
Lee-Sup Kim:
Design trade-off in merged DRAM logic for video signal processing.
ISCAS (5) 2001: 267-270 |
| 8 | | Joung-Youn Kim,
Lee-Sup Kim,
Seung-Ho Hwang:
An advanced contrast enhancement using partially overlapped sub-block histogram equalization.
IEEE Trans. Circuits Syst. Video Techn. 11(4): 475-484 (2001) |
| 7 | EE | Hyunchul Shin,
Jin-Aeon Lee,
Lee-Sup Kim:
A hardware cost minimized fast Phong shader.
IEEE Trans. VLSI Syst. 9(2): 297-304 (2001) |
| 2000 |
|---|
| 6 | EE | Sunho Chang,
Jong-Sun Kim,
Lee-Sup Kim:
A Memory Architecture with 4-Address Configurations for Video Signal Processing.
DATE 2000: 746 |
| 5 | EE | Jin-Aeon Lee,
Lee-Sup Kim:
SPARP: a single pass antialiased rasterization processor.
Computers & Graphics 24(2): 233-243 (2000) |
| 4 | | Seung-Kwon Paek,
Lee-Sup Kim:
A real-time wavelet vector quantization algorithm and its VLSI architecture.
IEEE Trans. Circuits Syst. Video Techn. 10(3): 475-489 (2000) |
| 3 | | Sunho Chang,
Bum-Sik Kim,
Lee-Sup Kim:
A programmable 3.2-GOPS merged DRAM logic for video signal processing.
IEEE Trans. Circuits Syst. Video Techn. 10(6): 967-973 (2000) |
| 1997 |
|---|
| 2 | EE | Bum-Sik Kim,
Dae-Hyum Chung,
Lee-Sup Kim:
A new 4-2 adder and booth selector for low power MAC unit.
ISLPED 1997: 100-103 |
| 1989 |
|---|
| 1 | EE | Lee-Sup Kim,
Robert W. Dutton:
Modeling of the distributed gate RC effect in MOSFET's.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(12): 1365-1367 (1989) |
