Cheng-Ta Hsieh

2002
16	EE	Cheng-Ta Hsieh, Massoud Pedram: Architectural energy optimization by bus splitting. IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 408-414 (2002)
2001
15	EE	Cheng-Ta Hsieh, L. Chen, Massoud Pedram: Microprocessor power analysis by labeled simulation. DATE 2001: 182-189
2000
14	EE	Cheng-Ta Hsieh, Massoud Pedram: Architectural Power Optimization by Bus Splitting. DATE 2000: 612-611
13		Wei Chen, Cheng-Ta Hsieh, Massoud Pedram: Simultaneous Gate Sizing and Fanout Optimization. ICCAD 2000: 374-378
12	EE	Chih-Shun Ding, Cheng-Ta Hsieh, Massoud Pedram: Improving the efficiency of Monte Carlo power estimation [VLSI]. IEEE Trans. VLSI Syst. 8(5): 584-593 (2000)
11	EE	Wei Chen, Cheng-Ta Hsieh, Massoud Pedram: Simultaneous gate sizing and placement. IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 206-214 (2000)
1999
10	EE	Wei Chen, Cheng-Ta Hsieh, Massoud Pedram: Gate sizing with controlled displacement. ISPD 1999: 127-132
1998
9	EE	Chih-Shun Ding, Cheng-Ta Hsieh, Massoud Pedram: Improving sampling efficiency for system level power estimation. ISLPED 1998: 115-117
8	EE	Cheng-Ta Hsieh, Massoud Pedram: Microprocessor power estimation using profile-driven program synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1080-1089 (1998)
7	EE	Chih-Shun Ding, Qing Wu, Cheng-Ta Hsieh, Massoud Pedram: Stratified random sampling for power estimation. IEEE Trans. on CAD of Integrated Circuits and Systems 17(6): 465-471 (1998)
1997
6	EE	Chih-Shun Ding, Qing Wu, Cheng-Ta Hsieh, Massoud Pedram: Statistical Estimation of the Cumulative Distribution Function for Power Dissipation in VLSI Cirucits. DAC 1997: 371-376
5	EE	Cheng-Ta Hsieh, Massoud Pedram, Gaurav Mehta, Fred Rastgar: Profile-Driven Program Synthesis for Evaluation of System Power Dissipation. DAC 1997: 576-581
1996
4	EE	Chih-Shun Ding, Cheng-Ta Hsieh, Qing Wu, Massoud Pedram: Stratified random sampling for power estimation. ICCAD 1996: 576-582
3	EE	Cheng-Ta Hsieh, Qing Wu, Chih-Shun Ding, Massoud Pedram: Statistical sampling and regression analysis for RT-level power evaluation. ICCAD 1996: 583-588
2	EE	Peter A. Beerel, Cheng-Ta Hsieh, Suhrid A. Wadekar: Estimation of energy consumption in speed-independent control circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 15(6): 672-680 (1996)
1995
1	EE	Peter A. Beerel, Cheng-Ta Hsieh, Suhrid A. Wadekar: Estimation of energy consumption in speed-independent control circuits. ISLPD 1995: 39-44

Coauthor Index

1	Peter A. Beerel	[1] [2]
2	L. Chen	[15]
3	Wei Chen	[10] [11] [13]
4	Chih-Shun Ding	[3] [4] [6] [7] [9] [12]
5	Gaurav Mehta	[5]
6	Massoud Pedram	[3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
7	Fred Rastgar	[5]
8	Suhrid A. Wadekar	[1] [2]
9	Qing Wu	[3] [4] [6] [7]

Colors in the list of coauthors