| 2000 |
|---|
| 10 | EE | Chih-Shun Ding,
Cheng-Ta Hsieh,
Massoud Pedram:
Improving the efficiency of Monte Carlo power estimation [VLSI].
IEEE Trans. VLSI Syst. 8(5): 584-593 (2000) |
| 1998 |
|---|
| 9 | EE | Chih-Shun Ding,
Cheng-Ta Hsieh,
Massoud Pedram:
Improving sampling efficiency for system level power estimation.
ISLPED 1998: 115-117 |
| 8 | EE | Qing Wu,
Qinru Qiu,
Massoud Pedram,
Chih-Shun Ding:
Cycle-accurate macro-models for RT-level power analysis.
IEEE Trans. VLSI Syst. 6(4): 520-528 (1998) |
| 7 | EE | Chih-Shun Ding,
Chi-Ying Tsui,
Massoud Pedram:
Gate-level power estimation using tagged probabilistic simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1099-1107 (1998) |
| 6 | EE | Chih-Shun Ding,
Qing Wu,
Cheng-Ta Hsieh,
Massoud Pedram:
Stratified random sampling for power estimation.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(6): 465-471 (1998) |
| 1997 |
|---|
| 5 | EE | Chih-Shun Ding,
Qing Wu,
Cheng-Ta Hsieh,
Massoud Pedram:
Statistical Estimation of the Cumulative Distribution Function for Power Dissipation in VLSI Cirucits.
DAC 1997: 371-376 |
| 4 | EE | Chi-Ying Tsui,
Kai-Keung Chan,
Qing Wu,
Chih-Shun Ding,
Massoud Pedram:
A Power Estimation Framework for Designing Low Power Portable Video Applications.
DAC 1997: 421-424 |
| 3 | EE | Qinru Qiu,
Qing Wu,
Massoud Pedram,
Chih-Shun Ding:
Cycle-accurate macro-models for RT-level power analysis.
ISLPED 1997: 125-130 |
| 1996 |
|---|
| 2 | EE | Chih-Shun Ding,
Cheng-Ta Hsieh,
Qing Wu,
Massoud Pedram:
Stratified random sampling for power estimation.
ICCAD 1996: 576-582 |
| 1 | EE | Cheng-Ta Hsieh,
Qing Wu,
Chih-Shun Ding,
Massoud Pedram:
Statistical sampling and regression analysis for RT-level power evaluation.
ICCAD 1996: 583-588 |
