1999 |
8 | EE | Stefan Pees,
Andreas Hoffmann,
Vojin Zivojnovic,
Heinrich Meyr:
LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures.
DAC 1999: 933-938 |
7 | EE | Lisa M. Guerra,
Joachim Fitzner,
Dipankar Talukdar,
Chris Schläger,
Bassam Tabbara,
Vojin Zivojnovic:
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification.
DAC 1999: 964-969 |
1997 |
6 | EE | Stefan Pees,
Martin Vaupel,
Vojin Zivojnovic,
Heinrich Meyr:
On core and more: a design perspective for systems-on-a-chip.
ASAP 1997: 448-457 |
5 | EE | Vojin Zivojnovic,
Steven W. K. Tjiang,
Heinrich Meyr:
Compiled Simulation of Programmable DSP Architectures.
VLSI Signal Processing 16(1): 73-80 (1997) |
1996 |
4 | EE | Vojin Zivojnovic,
Heinrich Meyr:
Compiled HW/SW Co-Simulation.
DAC 1996: 690-695 |
3 | EE | Vojin Zivojnovic,
Stefan Pees,
C. Schälger,
Markus Willems,
R. Schoenen,
Heinrich Meyr:
DSP Processor/Compiler Co-Design: A Quantitative Approach.
ISSS 1996: 108- |
1993 |
2 | | Vojin Zivojnovic,
Heinrich Meyr:
Design of optimum interpolation filters for digital demodulators.
ISCAS 1993: 140-143 |
1 | | Sebastian Ritz,
Matthias Pankert,
Vojin Zivojnovic,
Heinrich Meyr:
High-Level Software Synthesis for the Design of Communication Systems.
IEEE Journal on Selected Areas in Communications 11(3): 348-358 (1993) |