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Chihong Zhang

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2003
8EERamaswamy Govindarajan, Hongbo Yang, José Nelson Amaral, Chihong Zhang, Guang R. Gao: Minimum Register Instruction Sequencing to Reduce Register Spills in Out-of-Order Issue Superscalar Architectures. IEEE Trans. Computers 52(1): 4-20 (2003)
2001
7 Ramaswamy Govindarajan, Hongbo Yang, Chihong Zhang, José Nelson Amaral, Guang R. Gao: Minimum Register Instruction Sequence Problem: Revisiting Optimal Code Generation for DAGs. IPDPS 2001: 26
1999
6 Chihong Zhang, Ramaswamy Govindarajan, Sean Ryan, Guang R. Gao: Efficient State-Diagram Construction Methods for Software Pipelining. CC 1999: 153-167
5EERamaswamy Govindarajan, Chihong Zhang, Guang R. Gao: Minimum Register Instruction Scheduling: A New Approach for Dynamic Instruction Issue Processors. LCPC 1999: 70-84
1997
4EEZhizhong Tang, Chihong Zhang, Sifei Lvand, Tao Yu: A New Architecture For Branch-Intensive Loops. APDC 1997: 241-247
3EETao Yu, Zhizhong Tang, Chihong Zhang, Jun Luo: Control Mechanism for Software Pipelining on Nested Loop. APDC 1997: 345-350
2EEChihong Zhang, Zhizhong Tang: An Improvement on Data Dependence Analysis Supporting Software Pipelining Technique. APDC 1997: 378-382
1993
1EEZhizhong Tang, Gang Chen, Chihong Zhang, Yingwei Zhang, Bogong Su, Stanley Habib: GPMB - software pipelining branch-intensive loops. MICRO 1993: 21-30

Coauthor Index

1José Nelson Amaral (José N. Amaral) [7] [8]
2Gang Chen [1]
3Guang R. Gao [5] [6] [7] [8]
4Ramaswamy Govindarajan [5] [6] [7] [8]
5Stanley Habib [1]
6Jun Luo [3]
7Sifei Lvand [4]
8Sean Ryan [6]
9Bogong Su [1]
10Zhizhong Tang [1] [2] [3] [4]
11Hongbo Yang [7] [8]
12Tao Yu [3] [4]
13Yingwei Zhang [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)