2003 |
25 | EE | Sai-Weng Sin,
Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output.
ISCAS (1) 2003: 129-132 |
2002 |
24 | EE | Kong-Pang Pun,
Chiu-sing Choy,
Cheong-fat Chan,
José E. Franca:
A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators.
ISCAS (4) 2002: 221-224 |
23 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
Design and analysis of low timing-skew clock generation for time-interleaved sampled-data systems.
ISCAS (4) 2002: 441-444 |
2001 |
22 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering.
ISCAS (1) 2001: 204-207 |
21 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
A high-speed frequency up-translated SC bandpass filter with auto-zeroing for DDFS systems.
ISCAS (1) 2001: 320-323 |
20 | EE | Jorge Guilherme,
Pedro M. Figueiredo,
P. Azevedo,
G. Minderico,
A. Leal,
João C. Vital,
José E. Franca:
A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications.
ISCAS (1) 2001: 396-399 |
19 | EE | Kong-Pang Pun,
José E. Franca,
Carlos Azeredo Leme:
A quadrature sampling scheme with improved image rejection for complex-IF receivers.
ISCAS (1) 2001: 45-48 |
1999 |
18 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivity.
ISCAS (2) 1999: 57-60 |
17 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
High performance multirate SC circuits with predictive correlated double sampling technique.
ISCAS (2) 1999: 77-80 |
1997 |
16 | EE | N. C. Horta,
José E. Franca:
Algorithm-driven synthesis of data conversion architectures.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1116-1135 (1997) |
1995 |
15 | | João Goes,
João C. Vital,
José E. Franca:
Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration.
ISCAS 1995: 525-528 |
14 | | Jorge Guilherme,
José E. Franca:
New CMOS Logarithmic A/D Converters Employing Pipeline and Algorithmic Architectures.
ISCAS 1995: 529-532 |
1994 |
13 | | Wang Ping,
José E. Franca:
Switched-Current Multirate Filtering.
ISCAS 1994: 321-324 |
12 | | João Goes,
José E. Franca,
Nuno F. Paulino,
J. Grilo,
Gabor C. Temes:
High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters.
ISCAS 1994: 345-348 |
11 | | N. C. Horta,
José E. Franca:
A Methodology for Automatic Generation of Data Conversion Topologies from Algorithms.
ISCAS 1994: 371-374 |
10 | | Jorge Guilherme,
José E. Franca:
Digitally-Controlled Analogue Signal Processing and Conversion Techniques Employing a Logarithmic Building Block.
ISCAS 1994: 377-380 |
9 | | João Pedro A. Carreira,
José E. Franca:
High-Speed CMOS Current Comparators.
ISCAS 1994: 731-734 |
1993 |
8 | | Wang Ping,
José E. Franca:
Switched-capacitor Polyphase Structures for Two-dimensional Analog FIR Filtering.
ISCAS 1993: 1038-1041 |
7 | | José E. Franca,
Sanjit K. Mitra,
Antonio Petraglia:
Recent Developments and Future Trends of Multirate Analog-digital Systems.
ISCAS 1993: 1042-1045 |
6 | | F. P. Martins,
Nuno F. Paulino,
José E. Franca:
Charge Programming Techniques for SC Biquads.
ISCAS 1993: 1160-1163 |
5 | | João C. Vital,
José E. Franca:
A Concurrent Two-step Flash Analogue-to-digital Converter Architecture.
ISCAS 1993: 1196-1199 |
4 | | Bernardo G. Henriques,
José E. Franca:
High-speed D/A Conversion with Linear Phase Sin x/x Compensation.
ISCAS 1993: 1204-1207 |
3 | | F. C. Nunes,
José E. Franca:
Continuous-time Leapfrog Filter with Precise Successive Approximation Tuning.
ISCAS 1993: 1271-1273 |
2 | | João C. Vital,
José E. Franca,
Nuno S. Silva:
Fully-digital Testability of a High-speed Conversion System.
ISCAS 1993: 1595-1598 |
1 | | João C. Vital,
José E. Franca:
High-Speed A/D-D/A Conversion System with Flexible Testing Capabilities.
VLSI Design 1993: 357-362 |