| 2004 |
|---|
| 5 | EE | Jing-ling Yang,
Oliver Chiu-sing Choy,
Cheong-fat Chan,
Kong-Pong Pun:
Pipelines in Dynamic Dual-Rail Circuits.
PATMOS 2004: 701-710 |
| 4 | EE | Jing-ling Yang,
Chiu-sing Choy,
Cheong-fat Chan,
Kong-Pong Pun:
A high-efficiency strongly self-checking asynchronous datapath.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1484-1494 (2004) |
| 2003 |
|---|
| 3 | EE | Jing-ling Yang,
Oliver Chiu-sing Choy,
Cheong-fat Chan,
Kong-Pong Pun:
Design for Self-Checking and Self-Timed Datapath.
VTS 2003: 417-430 |
| 2002 |
|---|
| 2 | EE | Jing-ling Yang,
Oliver Chiu-sing Choy,
Cheong-fat Chan,
Kong-Pong Pun:
A Totally Self-Checking Dynamic Asynchronous Datapath.
Asian Test Symposium 2002: 27-32 |
| 1999 |
|---|
| 1 | | Juraj Povazanec,
Oliver Chiu-sing Choy,
Cheong-fat Chan,
Jan Butas,
Yeu-qiu Zhang,
Jing-ling Yang,
Tin-yan Tang:
Pipelined Dataflow Architecture of a Small Processor.
PDPTA 1999: 1217-1223 |
