Joan-Manuel Parcerisa

2007
14	EE	Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González: Improving Branch Prediction and Predicated Execution in Out-of-Order Processors. HPCA 2007: 75-84
13	EE	Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González: Early Register Release for Out-of-Order Processors with RegisterWindows. PACT 2007: 225-234
2006
12	EE	Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González: Selective predicate prediction for out-of-order processors. ICS 2006: 46-54
2005
11	EE	Stefan Bieschewski, Joan-Manuel Parcerisa, Antonio González: Memory Bank Predictors. ICCD 2005: 666-670
10	EE	Joan-Manuel Parcerisa, Julio Sahuquillo, Antonio González: On-Chip Interconnects and Instruction Steering Schemes for Clustered Microarchitectures. IEEE Trans. Parallel Distrib. Syst. 16(2): 130-144 (2005)
2002
9	EE	Joan-Manuel Parcerisa, Julio Sahuquillo, Antonio González, José Duato: Efficient Interconnects for Clustered Microarchitectures. IEEE PACT 2002: 291-
2001
8	EE	Joan-Manuel Parcerisa, Antonio González: Improving Latency Tolerance of Multithreading through Decoupling. IEEE Trans. Computers 50(10): 1084-1094 (2001)
7		Ramon Canal, Joan-Manuel Parcerisa, Antonio González: Dynamic Code Partitioning for Clustered Architectures. International Journal of Parallel Programming 29(1): 59-79 (2001)
2000
6	EE	Ramon Canal, Joan-Manuel Parcerisa, Antonio González: Dynamic Cluster Assignment Mechanisms. HPCA 2000: 133-
5	EE	Joan-Manuel Parcerisa, Antonio González: Reducing wire delay penalty through value prediction. MICRO 2000: 317-326
1999
4	EE	Joan-Manuel Parcerisa, Antonio González: The Synergy of Multithreading and Access/Execute Decoupling. HPCA 1999: 59-63
3	EE	Ramon Canal, Joan-Manuel Parcerisa, Antonio González: A Cost-Effective Clustered Architecture. IEEE PACT 1999: 160-168
1998
2	EE	Joan-Manuel Parcerisa, Antonio González: The Latency Hiding Effectiveness of Decoupled Access/Execute Processors. EUROMICRO 1998: 10293-10300
1997
1	EE	Antonio González, Mateo Valero, Nigel P. Topham, Joan-Manuel Parcerisa: Eliminating Cache Conflict Misses through XOR-Based Placement Functions. International Conference on Supercomputing 1997: 76-83

Coauthor Index

1	Stefan Bieschewski	[11]
2	Ramon Canal	[3] [6] [7]
3	José Duato	[9]
4	Antonio González	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
5	Eduardo Quiñones	[12] [13] [14]
6	Julio Sahuquillo	[9] [10]
7	Nigel P. Topham	[1]
8	Mateo Valero	[1]