Eric Senn

2008
26	EE	Eric Senn, Johann Laurent, Emmanuel Juin, Jean-Philippe Diguet: Refining Power Consumption Estimations in the Component-based AADL Design Flow. FDL 2008: 173-178
25	EE	Gwenolé Corre, Eric Senn, Nathalie Julien, Eric Martin: Estimation et optimisation de la consommation des mémoires. Technique et Science Informatiques 27(1-2): 235-254 (2008)
2007
24	EE	Johann Laurent, Eric Senn, Nathalie Julien: Méthodes et outils d'estimation de la consommation de code embarqué sur processeur. Technique et Science Informatiques 26(5): 509-534 (2007)
2006
23		Eric Senn, Nathalie Julien, David Elléouet, Yannig Savary, Nabil Abdelli: Building and Using System, Algorithmic, and Architectural Power and Energy Models in the FPGA Design. ReCoSoC 2006: 83-90
22	EE	Gwenolé Corre, Nathalie Julien, Eric Senn, Eric Martin: Intégration de la synthèse mémoire dans l'outil de synthèse d'architecture GAUT Low Power CoRR abs/cs/0605142: (2006)
21	EE	Philippe Coussy, Gwenolé Corre, Pierre Bomel, Eric Senn, Eric Martin: High-level synthesis under I/O Timing and Memory constraints CoRR abs/cs/0605143: (2006)
20	EE	Gwenolé Corre, Nathalie Julien, Eric Senn, Eric Martin: A Memory Aware High Level Synthesis Too CoRR abs/cs/0605144: (2006)
19	EE	Gwenolé Corre, Eric Senn, Nathalie Julien, Eric Martin: Memory Aware High-Level Synthesis for Embedded Systems CoRR abs/cs/0605145: (2006)
18	EE	Gwenolé Corre, Philippe Coussy, Pierre Bomel, Eric Senn, Eric Martin: Synthèse Comportementale Sous Contraintes de Communication et de Placement Mémoire pour les composants du TDSI CoRR abs/cs/0605146: (2006)
2005
17	EE	Philippe Coussy, Gwenolé Corre, Eric Senn, Pierre Bomel, Eric Martin: High-level synthesis under I/O timing and memory constraints. ISCAS (1) 2005: 680-683
16		Nathalie Julien, Johann Laurent, Eric Senn, David Elléouet, Yannig Savary, Nabil Abdelli, J. Ktari: Power/Energy Estimation in SoCs by Multi-Level Parametric Modeling. ReCoSoC 2005: 137-142
2004
15	EE	Gwenolé Corre, Eric Senn, Nathalie Julien, Eric Martin: A memory aware behavioral synthesis tool for real-time VLSI circuits. ACM Great Lakes Symposium on VLSI 2004: 82-85
14	EE	Gwenolé Corre, Eric Senn, Pierre Bomel, Nathalie Julien, Eric Martin: Memory accesses management during high level synthesis. CODES+ISSS 2004: 42-47
13	EE	Johann Laurent, Nathalie Julien, Eric Senn, Eric Martin: Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors. DATE 2004: 666-667
12	EE	Gwenolé Corre, Eric Senn, Nathalie Julien, Eric Martin: Memory Aware HLS and the Implementation of Ageing Vectors. DSD 2004: 88-95
11	EE	Florian Marteil, Nathalie Julien, Eric Senn, Eric Martin: A Complete Methodology for Memory Optimization in DSP Applications. DSD 2004: 98-103
10	EE	Gwenolé Corre, Eric Senn, Nathalie Julien, Eric Martin: A Memory Aware High Level Synthesis Tool . ISVLSI 2004: 279-280
9	EE	Eric Senn, Johann Laurent, Nathalie Julien, Eric Martin: SoftExplorer: Estimation, Characterization, and Optimization of the Power and Energy Consumption at the Algorithmic Level. PATMOS 2004: 342-351
2003
8	EE	Nathalie Julien, Johann Laurent, Eric Senn, Eric Martin: Power Consumption Modeling and Characterization of the TI C6201. IEEE Micro 23(5): 40-49 (2003)
2002
7	EE	Nathalie Julien, Johann Laurent, Eric Senn, Eric Martin: Power Estimation of a C Algorithm Based on the Functional-Level Power Analysis of a Digital Signal Processor. ISHPC 2002: 354-360
6	EE	Eric Senn, Nathalie Julien, Johann Laurent, Eric Martin: Power Consumption Estimation of a C Program for Data-Intensive Applications. PATMOS 2002: 332-341
2001
5		Eric Senn, Eric Martin: A Vision System on Chip for Industrial Control. VLSI-SOC 2001: 27-38
2000
4	EE	Eric Senn, Bertrand Zavidovique: Examples of Image Processing to Benefit from an Asynchronous Implementation. CAMP 2000: 270-279
1999
3	EE	Eric Senn, Bertrand Zavidovique: Self-Timed Design: An Avenue to Complex Computer Systems. HICSS 1999
2	EE	Eric Senn, Bertrand Zavidovique: Hazard-Free Self-Timed Design: Methodology and Application to Asynchronous Routing in an Heterogeneous Parallel Machine. VLSI Signal Processing 22(3): 197-215 (1999)
1998
1	EE	Eric Senn, Bertrand Zavidovique: A Self Timed Asynchronous Router for an Heterogeneous Parallel Machine. Great Lakes Symposium on VLSI 1998: 161-167

Coauthor Index

1	Nabil Abdelli	[16] [23]
2	Pierre Bomel	[14] [17] [18] [21]
3	Gwenolé Corre	[10] [12] [14] [15] [17] [18] [19] [20] [21] [22] [25]
4	Philippe Coussy	[17] [18] [21]
5	Jean-Philippe Diguet	[26]
6	David Elléouet	[16] [23]
7	Emmanuel Juin	[26]
8	Nathalie Julien	[6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [19] [20] [22] [23] [24] [25]
9	J. Ktari	[16]
10	Johann Laurent	[6] [7] [8] [9] [13] [16] [24] [26]
11	Florian Marteil	[11]
12	Eric Martin	[5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [17] [18] [19] [20] [21] [22] [25]
13	Yannig Savary	[16] [23]
14	Bertrand Zavidovique	[1] [2] [3] [4]

Colors in the list of coauthors