SBAC-PAD 2006: Ouro Preto, Minas Gerais, Brazil

18th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2006), 17-20 October 2006, Ouro Preto, Minas Gerais, Brazil. IEEE Computer Society 2006 BibTeX

High Perfomance Applications

Renata Braga Araújo, Guilherme Henrique Trielli Ferreira, Gustavo Henrique Orair, Wagner Meira Jr., Renato Ferreira, Dorgival Olavo Guedes Neto:
ParTriCluster: A Scalable Parallel Algorithm for Gene Expression Analysis. 3-10
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Alvaro Luiz Fazenda, Eduardo Hidenori Enari, Luiz Flavio Rodrigues, Jairo Panetta:
Towards Production Code Effective Portability among Vector Machines and Microprocessor-Based Architectures. 11-20
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Grid and Cluster Computing 1

Reinaldo Lourenso, Sergio Takeo Kofuji:
Data Segmentation Management Infrastructure in a Database Grid. 21-27
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Felipe Martins, Márcio Maia, Rossana M. de Castro Andrade, Aldri L. dos Santos, José Neuman de Souza:
Detecting Malicious Manipulation in Grid Environments. 28-35
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Kyong Hoon Kim, Rajkumar Buyya:
Policy-based Resource Allocation in Hierarchical Virtual Organizations for Global Grids. 36-46
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Processor Microarchitecture

Maurício L. Pilla, Bruce R. Childers, Amarildo T. da Costa, Felipe M. G. França, Philippe Olivier Alexandre Navaux:
A Speculative Trace Reuse Architecture with Reduced Hardware Requirements. 47-54
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Daniel A. Jiménez, Gabriel H. Loh:
Controlling the Power and Area of Neural Branch Predictors for Practical Implementation in High-Performance Processors. 55-62
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Peter Rounce, Alberto Ferreira de Souza:
The mDTSVLIW: a Multi-Threaded Trace-based VLIW Architecture. 63-72
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Grid and Cluster Computing 2

César A. F. De Rose, Tiago C. Ferreto, Marcelo B. de Farias, Vladimir G. Dias, Walfredo Cirne, Milena P. M. Oliveira, Katia B. Saikoski, Maria Luiza Danieleski:
GerpavGrid: using the Grid to maintain the city road system. 73-80
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George Teodoro, Tulio Tavares, Renato Ferreira, Tahsin M. Kurç, Wagner Meira Jr., Dorgival Olavo Guedes Neto, Tony Pan, Joel H. Saltz:
A Run-time System for Efficient Execution of Scientific Workflows on Distributed Environments. 81-90
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Performance Measurement and Analysis

Fredrik Warg, Per Stenström:
Dual-Thread Speculation: Two Threads in the Machine are Worth Eight in the Bush. 91-98
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Wessam Hassanein, Moustafa A. Hammad, Layali K. Rashid:
Characterizing the Performance of Data Management Systems on Hyper-Threaded Architectures. 99-106
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Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck:
Ultra-Fast CPU Performance Prediction: Extending the Monte Carlo Approach. 107-116
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Memory Hierarchy Architecture

Martin Thuresson, Per Stenström:
Scalable Value-Cache Based Compression Schemes for Multiprocessors. 117-124
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Abel Guilhermino S. Filho, Pablo Viana, Edna Barros, Manoel Eusebio de Lima:
Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption. 125-132
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Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López:
Applying the zeros switch-off technique to reduce static energy in data caches. 133-140
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Mario Donato Marino:
32-core CMP with multi-sliced L2: 2 and 4 cores sharing a L2 slice. 141-150
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Parallel and Distributed Algorithms, Architectures and Interconnection Networks

Frank Olaf Sem-Jacobsen, Olav Lysne, Tor Skeie:
Combining Source Routing and Dynamic Fault Tolerance. 151-158
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Rafael Mendes, Lauro Whately, Maria Clicia Stelling de Castro, Cristiana Bentes, Claudio Luis de Amorim:
Runtime System Support for Running Applications with Dynamic and Asynchronous Task Parallelism in Software DSM Systems. 159-166
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Vasanth Krishna Namasivayam, Animesh Pathak, Viktor K. Prasanna:
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference. 167-176
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Reconfigurable Systems and Operating System Support for Specific Applications

M. C. Andrade, Célio Estevan Morón, José Hiroki Saito:
Reconfigurable System with Virtuoso Real-Time Kernel and TEV Environment. 177-184
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Youhui Zhang, Yu Gu, Hongyi Wang, Dongsheng Wang:
Virtual-Machine-based Intrusion Detection on File-aware Block Level Storage. 185-192
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