| 2007 |
|---|
| 6 | EE | Santosh Talli,
Ram Srinivasan,
Jeanine Cook:
Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization.
IPCCC 2007: 372-379 |
| 2006 |
|---|
| 5 | EE | Ram Srinivasan,
Jeanine Cook,
Olaf M. Lubeck:
Ultra-Fast CPU Performance Prediction: Extending the Monte Carlo Approach.
SBAC-PAD 2006: 107-116 |
| 4 | EE | Ram Srinivasan,
Jeanine Cook,
Olaf M. Lubeck:
Performance modeling using Monte Carlo simulation.
Computer Architecture Letters 5(1): 38-41 (2006) |
| 2005 |
|---|
| 3 | EE | Ram Srinivasan,
Jeanine Cook,
Shaun Cooper:
Fast, Accurate Microarchitecture Simulation Using Statistical Phase Detection.
ISPASS 2005: 147-156 |
| 2 | EE | Wiplove Mathur,
Jeanine Cook:
Improved Estimation for Software Multiplexing of Performance Counters.
MASCOTS 2005: 23-34 |
| 2002 |
|---|
| 1 | EE | Jeanine Cook,
Richard L. Oliver,
Eric E. Johnson:
Toward reducing processor simulation time via dynamic reduction of microarchitecture complexity.
SIGMETRICS 2002: 252-253 |
