dblp.uni-trier.dewww.uni-trier.de

Svetlana N. Yanushkevich

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2008
26EESvetlana N. Yanushkevich, Oleg Boulanov, Adrian Stoica, Vlad P. Shmerko: Support of Interviewing Techniques in Physical Access Control Systems. IWCF 2008: 147-158
25EESvetlana N. Yanushkevich, David Hurley, Patrick S. P. Wang: Editorial. IJPRAI 22(3): 367-369 (2008)
24EESang-Woong Lee, Patrick S. P. Wang, Svetlana N. Yanushkevich, Seong-Whan Lee: Noniterative 3D Face Reconstruction Based on Photometric Stereo. IJPRAI 22(3): 389-410 (2008)
2007
23 Patrick S. P. Wang, Svetlana N. Yanushkevich: Biometric technologies and applications. Artificial Intelligence and Applications 2007: 249-254
2006
22EESvetlana N. Yanushkevich: Synthetic Biometrics: A Survey. IJCNN 2006: 676-683
21EESvetlana N. Yanushkevich, Vlad P. Shmerko, Oleg Boulanov: Embedding and Assembling Techniques for Spatial Computing Structure Design using Decision Trees and Diagrams. ISMVL 2006: 29
20EESvetlana N. Yanushkevich: A concept of intelligent biometric-based early detection and warning system. PST 2006: 55
2004
19EESvetlana N. Yanushkevich, Vlad P. Shmerko, L. Guy, D. C. Lu: Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic. ISMVL 2004: 275-280
2003
18EESvetlana N. Yanushkevich: Editorial - Artificial Intelligence in Logic Design. Artif. Intell. Rev. 20(3-4): 167-168 (2003)
17EEVlad P. Shmerko, Svetlana N. Yanushkevich: Three-Dimensional Feedforward Neural Networks and Their Realization by Nano-Devices. Artif. Intell. Rev. 20(3-4): 473-494 (2003)
2002
16EESvetlana N. Yanushkevich, Piotr Dziurzanski, Vlad P. Shmerko: The Word-Level Models for Efficient Computation of Multiple-Valued Functions. PART 1: LAR Based Model. ISMVL 2002: 202-208
15EEAnna M. Tomaszewska, Svetlana N. Yanushkevich, Vlad P. Shmerko: The Word-Level Models for Efficient Computation of Multiple-Valued Functions. PART 2: LWL Based Model. ISMVL 2002: 209-215
14 Svetlana N. Yanushkevich, Vlad P. Shmerko, V. D. Malyugin, Piotr Dziurzanski: Linearity of World-Level Circuit Models: New Understanding. IWLS 2002: 67-72
13 Svetlana N. Yanushkevich: Matrix and combinatorics solutions of Boolean differential equations. Discrete Applied Mathematics 117(1-3): 279-292 (2002)
2001
12 V. Cheushev, Svetlana N. Yanushkevich, Vlad P. Shmerko, Claudio Moraga, Joanna Kolodziejczyk: Information Theory Method for Flexible Network Synthesis. ISMVL 2001: 201-206
11 Anna M. Tomaszewska, Piotr Dziurzanski, Svetlana N. Yanushkevich, Vlad P. Shmerko: Two-Stage Exact Detection of Symmetrics. ISMVL 2001: 213-
10 Jon T. Butler, Gerhard W. Dueck, Svetlana N. Yanushkevich, Vlad P. Shmerko: On the number of generators for transeunt triangles. Discrete Applied Mathematics 108(3): 309-316 (2001)
2000
9EETadeusz Luba, Claudio Moraga, Svetlana N. Yanushkevich, Vlad P. Shmerko, Joanna Kolodziejczyk: Application of Design Style in Evolutionary Multi-Level Networks Synthesis. EUROMICRO 2000: 1156-1163
8EESvetlana N. Yanushkevich, Jon T. Butler, Gerhard W. Dueck, Vlad P. Shmerko: Experiments on FPRM Expressions for Partially Symmetric Logic Functions. ISMVL 2000: 141-146
7EETadeusz Luba, Claudio Moraga, Svetlana N. Yanushkevich, M. Opoka, Vlad P. Shmerko: Evolutionary Multi-Level Network Synthesis in Given Design Style. ISMVL 2000: 253-258
6EESvetlana N. Yanushkevich, Denis V. Popel, Vlad P. Shmerko, V. Cheushev, Radomir S. Stankovic: Information Theoretic Approach to Minimization of Polynomial Expressions over GF(4). ISMVL 2000: 265-
5EEJon T. Butler, Gerhard W. Dueck, Vlad P. Shmerko, Svetlana N. Yanushkevich: Comments on "Sympathy: fast exact minimization of fixedpolarity Reed-Muller expansion for symmetric functions". IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1386-1388 (2000)
1998
4EEV. Cheushev, Vlad P. Shmerko, Dan A. Simovici, Svetlana N. Yanushkevich: Functional Entropy and Decision Trees. ISMVL 1998: 257-
1997
3EEVlad P. Shmerko, Svetlana N. Yanushkevich, Vitaly G. Levashenko: Test Pattern Generation for Combinatorial Multi-Valued Networks Based on Generalized D-Algorithm. ISMVL 1997: 139-144
1996
2EEVlad P. Shmerko, Svetlana N. Yanushkevich, Vitaly G. Levashenko, I. Bondar: Technique of Computing Logic Derivatives for MVL-Functions. ISMVL 1996: 267-272
1 Vlad P. Shmerko, Svetlana N. Yanushkevich, K. Malecki: A Class of Logic design Problems solved based on Parallel Computations of Butterfly Configurations. PDPTA 1996: 1589-1592

Coauthor Index

1I. Bondar [2]
2Oleg Boulanov [21] [26]
3Jon T. Butler [5] [8] [10]
4V. Cheushev [4] [6] [12]
5Gerhard W. Dueck [5] [8] [10]
6Piotr Dziurzanski [11] [14] [16]
7L. Guy [19]
8David Hurley [25]
9Joanna Kolodziejczyk [9] [12]
10Sang-Woong Lee [24]
11Seong-Whan Lee [24]
12Vitaly G. Levashenko [2] [3]
13D. C. Lu [19]
14Tadeusz Luba [7] [9]
15K. Malecki [1]
16V. D. Malyugin [14]
17Claudio Moraga [7] [9] [12]
18M. Opoka [7]
19Denis V. Popel [6]
20Vlad P. Shmerko [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [14] [15] [16] [17] [19] [21] [26]
21Dan A. Simovici [4]
22Radomir S. Stankovic [6]
23Adrian Stoica [26]
24Anna M. Tomaszewska [11] [15]
25Patrick S. P. Wang [23] [24] [25]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)