| 2005 |
|---|
| 10 | EE | H. Ando,
Nestoras Tzartzanis,
William W. Walker:
A Case Study: Power and Performance Improvement of a Chip Multiprocessor for Transaction Processing.
IEEE Trans. VLSI Syst. 13(7): 865-868 (2005) |
| 2003 |
|---|
| 9 | EE | Nestoras Tzartzanis,
William W. Walker:
A Transparent Voltage Conversion Method and Its Application to a Dual-Supply-Voltage Register File.
ICCD 2003: 107- |
| 1999 |
|---|
| 8 | EE | Nestoras Tzartzanis,
William C. Athas:
Clock-Powered CMOS: A Hybrid Adiabatic Logic Style for Energy-Efficient Computing.
ARVLSI 1999: 137-153 |
| 7 | EE | Nestoras Tzartzanis,
William C. Athas:
Retractile clock-powered logic.
ISLPED 1999: 18-23 |
| 1997 |
|---|
| 6 | EE | William C. Athas,
Nestoras Tzartzanis,
Lars J. Svensson,
Lena Peterson,
Huimin Li,
Xing Yu Jiang,
Peiqing Wang,
W.-C. Liu:
AC-1: a clock-powered microprocessor.
ISLPED 1997: 328-333 |
| 1996 |
|---|
| 5 | EE | Nestoras Tzartzanis,
William C. Athas:
Energy recovery for the design of high-speed, low-power static RAMs.
ISLPED 1996: 55-60 |
| 1995 |
|---|
| 4 | EE | William C. Athas,
Nestoras Tzartzanis:
Energy recovery for low-power CMOS.
ARVLSI 1995: 415-429 |
| 3 | EE | Nestoras Tzartzanis,
William C. Athas:
Design and analysis of a low-power energy-recovery adder.
Great Lakes Symposium on VLSI 1995: 66-69 |
| 1994 |
|---|
| 2 | EE | William C. Athas,
Lars J. Svensson,
J. G. Koller,
Nestoras Tzartzanis,
E. Ying-Chin Chou:
Low-power digital systems based on adiabatic-switching principles.
IEEE Trans. VLSI Syst. 2(4): 398-407 (1994) |
| 1991 |
|---|
| 1 | | Manolis Katevenis,
Nestoras Tzartzanis:
Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory.
ASPLOS 1991: 15-27 |
