| 2007 |
|---|
| 8 | EE | Hao San,
Yoshitaka Jingu,
Hiroki Wada,
Hiroyuki Hagiwara,
Akira Hayakawa,
Haruo Kobayashi,
Tatsuji Matsuura,
Kouichi Yahagi,
Junya Kudoh,
Hideo Nakane,
Masao Hotta,
Toshiro Tsukada,
Koichiro Mashiko,
Atsushi Wada:
A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm.
IEICE Transactions 90-C(6): 1181-1188 (2007) |
| 2006 |
|---|
| 7 | EE | Hao San,
Akira Hayakawa,
Yoshitaka Jingu,
Hiroki Wada,
Hiroyuki Hagiwara,
Kazuyuki Kobayashi,
Haruo Kobayashi,
Tatsuji Matsuura,
Kouichi Yahagi,
Junya Kudoh,
Hideo Nakane,
Masao Hotta,
Toshiro Tsukada,
Koichiro Mashiko,
Atsushi Wada:
Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout.
IEICE Transactions 89-A(4): 908-915 (2006) |
| 6 | EE | Masafumi Uemori,
Haruo Kobayashi,
Tomonari Ichikawa,
Atsushi Wada,
Koichiro Mashiko,
Toshiro Tsukada,
Masao Hotta:
High-Speed Continuous-Time Subsampling Bandpass DeltaSigmaAD Modulator Architecture Employing Radio Frequency DAC.
IEICE Transactions 89-A(4): 916-923 (2006) |
| 2005 |
|---|
| 5 | EE | Atsushi Wada,
Keiki Takadama,
Katsunori Shimohara:
Learning classifier system equivalent with reinforcement learning with function approximation.
GECCO Workshops 2005: 92-93 |
| 4 | EE | Atsushi Wada,
Keiki Takadama,
Katsunori Shimohara:
Counter example for Q-bucket-brigade under prediction problem.
GECCO Workshops 2005: 94-99 |
| 3 | EE | Atsushi Wada,
Keiki Takadama,
Katsunori Shimohara,
Osamu Katai:
Analyzing Parameter Sensitivity and Classifier Representations for Real-Valued XCS.
IWLCS 2005: 1-16 |
| 2 | EE | Atsushi Wada,
Keiki Takadama,
Katsunori Shimohara:
Counter Example for Q-Bucket-Brigade Under Prediction Problem.
IWLCS 2005: 128-143 |
| 2001 |
|---|
| 1 | EE | Kuniyuki Tani,
Norihiro Nikai,
Atsushi Wada,
Tetsuro Sawai:
A pipelined ADC macro design for multiple applications.
ASP-DAC 2001: 269-274 |
