| 2006 |
|---|
| 8 | EE | Markus Seuring:
Combining Scan Test and Built-in Self Test.
J. Electronic Testing 22(3): 297-299 (2006) |
| 2003 |
|---|
| 7 | EE | Adit D. Singh,
Markus Seuring,
Michael Gössel,
Egor S. Sogomonyan:
Multimode scan: Test per clock BIST for IP cores.
ACM Trans. Design Autom. Electr. Syst. 8(4): 491-505 (2003) |
| 2000 |
|---|
| 6 | EE | Debaleena Das,
Nur A. Touba,
Markus Seuring,
Michael Gössel:
Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes.
IOLTW 2000: 171- |
| 5 | EE | Markus Seuring,
Krishnendu Chakrabarty:
Space Compaction of Test Responses for IP Cores Using Orthogonal Transmission Functions.
VTS 2000: 213-220 |
| 1999 |
|---|
| 4 | EE | Markus Seuring,
Michael Gössel:
A Structural Approach for Space Compaction for Sequential Circuits.
DFT 1999: 227- |
| 3 | | Adit D. Singh,
Egor S. Sogomonyan,
Michael Gössel,
Markus Seuring:
Testability evaluation of sequential designs incorporating the multi-mode scannable memory element.
ITC 1999: 286-293 |
| 2 | EE | Markus Seuring,
Michael Gössel:
A Structural Method for Output Compaction of Sequential Automata Implemented as Circuits.
WIA 1999: 158-163 |
| 1998 |
|---|
| 1 | EE | Markus Seuring,
Michael Gössel,
Egor S. Sogomonyan:
A Structural Approach for Space Compaction for Concurrent Checking and BIST.
VTS 1998: 354-361 |
