dblp.uni-trier.dewww.uni-trier.de

André K. Nieuwland

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2008
14EEDaniele Rossi, André K. Nieuwland, Cecilia Metra: Simultaneous Switching Noise: The Relation between Bus Layout and Coding. IEEE Design & Test of Computers 25(1): 76-86 (2008)
13EEDaniele Rossi, André K. Nieuwland, Steven V. E. S. van Dijk, Richard P. Kleihorst, Cecilia Metra: Power Consumption of Fault Tolerant Busses. IEEE Trans. VLSI Syst. 16(5): 542-553 (2008)
2006
12EEAndré K. Nieuwland, Samir Jasarevic, Goran Jerin: Combinational Logic Soft Error Analysis and Protection. IOLTS 2006: 99-104
2005
11EEAndré K. Nieuwland, Atul Katoch, Daniele Rossi, Cecilia Metra: Coding Techniques for Low Switching Noise in Fault Tolerant Busses. IOLTS 2005: 183-189
10EERégis Leveugle, Yervant Zorian, Luca Breveglieri, André K. Nieuwland, Klaus Rothbart, Jean-Pierre Seifert: On-Line Testing for Secure Implementations: Design and Validation. IOLTS 2005: 211
9EEDaniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra: Exploiting ECC Redundancy to Minimize Crosstalk Impact. IEEE Design & Test of Computers 22(1): 59-70 (2005)
8EEDaniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra: New ECC for Crosstalk Impact Minimization. IEEE Design & Test of Computers 22(4): 340-348 (2005)
2004
7EEClaudia Kretzschmar, André K. Nieuwland, Dietmar Müller: Why Transition Coding for Power Minimization of On-Chip Buses Does Not Work. DATE 2004: 512-517
6EEDaniele Rossi, A. Muccio, André K. Nieuwland, Atul Katoch, Cecilia Metra: Impact of ECCs on Simultaneously Switching Output Noise for On-Chip Busses of High Reliability Systems. IOLTS 2004: 135-140
5EEAndré K. Nieuwland, Patrick Gindner: Automated Logic SER Analysis and On-Line SER reduction. IOLTS 2004: 177
4EEAndré K. Nieuwland, Atul Katoch, Maurice Meijer: Reducing Cross-Talk Induced Power Consumption and Delay. PATMOS 2004: 179-188
3EEAndré K. Nieuwland, Richard P. Kleihorst: IC Cost Reduction by Applying Embedded Fault Tolerance for Soft Errors. J. Electronic Testing 20(5): 533-542 (2004)
2003
2EEDaniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, André K. Nieuwland, Cecilia Metra: Power Consumption of Fault Tolerant Codes: the Active Elements. IOLTS 2003: 61-67
1EEAndré K. Nieuwland, Richard P. Kleihorst: The positive effect on IC yield of embedded Fault Tolerance for SEUs. IOLTS 2003: 75-

Coauthor Index

1Luca Breveglieri [10]
2Steven V. E. S. van Dijk [2] [13]
3Patrick Gindner [5]
4Samir Jasarevic [12]
5Goran Jerin [12]
6Atul Katoch [4] [6] [8] [9] [11]
7Richard P. Kleihorst [1] [2] [3] [13]
8Claudia Kretzschmar [7]
9Régis Leveugle [10]
10Maurice Meijer [4]
11Cecilia Metra [2] [6] [8] [9] [11] [13] [14]
12A. Muccio [6]
13Dietmar Müller [7]
14Daniele Rossi [2] [6] [8] [9] [11] [13] [14]
15Klaus Rothbart [10]
16Jean-Pierre Seifert [10]
17Yervant Zorian [10]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)