2005 |
13 | EE | Francisco Duarte,
José Machado da Silva,
José Carlos Alves,
G. A. Pinho,
José Silva Matos:
A processor for testing mixed-signal cores in System-on-Chip.
DSD 2005: 184-191 |
2004 |
12 | EE | João Canas Ferreira,
José Silva Matos:
A Development Support System for Applications That Use Dynamically Reconfigurable Hardware.
FPL 2004: 886-890 |
2000 |
11 | EE | José Machado da Silva,
J. Soeiro Duarte,
José Silva Matos:
Mixed-Signal BIST Using Correlation and Reconfigurable Hardware.
DATE 2000: 744 |
1999 |
10 | EE | José Carlos Alves,
João Canas Ferreira,
C. Albuquerque,
José F. Oliveira,
J. Soeiro Ferreira,
José Silva Matos:
FAFNER-Accelerating Nesting Problems with FPGAs.
FCCM 1999: 168- |
1998 |
9 | EE | José Carlos Alves,
José Silva Matos:
RVC - A Reconfigurable Coprocessor for Vector Processing Applications.
FCCM 1998: 258-259 |
8 | EE | João Canas Ferreira,
José Silva Matos:
A Prototype System for Rapid Application Development using Dynamically Reconfigurable Hardware.
FCCM 1998: 280-281 |
7 | | José Silva Matos:
Computer Organisation, Programming and Benchmarking - Introduction.
VECPAR 1998: 331-333 |
1997 |
6 | | José Machado da Silva,
Ana C. Leão,
José Silva Matos,
José Carlos Alves:
Implementation of Mixed Current/Voltage Testing Using the IEEE P1149.4 Infrastructure.
ITC 1997: 509-517 |
1996 |
5 | | José Carlos Alves,
André T. Puga,
Luís Corte-Real,
José Silva Matos:
ProHos-1 - A Vector Processor for the Efficient Estimation of Higher-Order Moments.
VECPAR 1996: 96-107 |
4 | EE | José Machado da Silva,
José Silva Matos,
Ian M. Bell,
Gaynor E. Taylor:
Mixed current/voltage observation towards effective testing of analog and mixed-signal circuits.
J. Electronic Testing 9(1-2): 75-88 (1996) |
1994 |
3 | | José Silva Matos,
João Canas Ferreira,
Ana C. Leão,
José Machado da Silva:
An Approach to Testability Improvement of Mixed-Signal Boards.
ISCAS 1994: 161-164 |
1993 |
2 | | José Silva Matos,
Ana C. Leão,
João Canas Ferreira:
Control and Observation of Analog Nodes in Mixed-Signal Boards.
ITC 1993: 323-331 |
1992 |
1 | | José M. M. Ferreira,
Filipe S. Pinto,
José Silva Matos:
A Boundary Scan Test Controller for Hierarchical BIST.
ITC 1992: 217-223 |