| 2007 |
|---|
| 13 | EE | Jiong Luo,
Niraj K. Jha,
Li-Shiuan Peh:
Simultaneous Dynamic Voltage Scaling of Processors and Communication Links in Real-Time Distributed Embedded Systems.
IEEE Trans. VLSI Syst. 15(4): 427-437 (2007) |
| 12 | EE | Jiong Luo,
Niraj K. Jha:
Power-Efficient Scheduling for Heterogeneous Distributed Real-Time Embedded Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1161-1170 (2007) |
| 2005 |
|---|
| 11 | EE | Le Yan,
Jiong Luo,
Niraj K. Jha:
Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 1030-1041 (2005) |
| 2004 |
|---|
| 10 | EE | Jiong Luo,
Lin Zhong,
Yunsi Fei,
Niraj K. Jha:
Register binding-based RTL power management for control-flow intensive designs.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1175-1183 (2004) |
| 2003 |
|---|
| 9 | EE | Weidong Wang,
Tat Kee Tan,
Jiong Luo,
Yunsi Fei,
Li Shang,
Keith S. Vallerio,
Lin Zhong,
Anand Raghunathan,
Niraj K. Jha:
A comprehensive high-level synthesis system for control-flow intensive behaviors.
ACM Great Lakes Symposium on VLSI 2003: 11-14 |
| 8 | EE | Jiong Luo,
Li-Shiuan Peh,
Niraj K. Jha:
Simultaneous Dynamic Voltage Scaling of Processors and Communication Links in Real-Time Distributed Embedded Systems.
DATE 2003: 11150-11151 |
| 7 | EE | Le Yan,
Jiong Luo,
Niraj K. Jha:
Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems.
ICCAD 2003: 30-38 |
| 6 | EE | Jiong Luo,
Niraj K. Jha:
Power-profile Driven Variable Voltage Sealing for Heterogeneous Distributed Real-time Embedded Systems.
VLSI Design 2003: 369-375 |
| 2002 |
|---|
| 5 | EE | Jiong Luo,
Niraj K. Jha:
Low Power Distributed Embedded Systems: Dynamic Voltage Scaling and Synthesis.
HiPC 2002: 679-692 |
| 4 | EE | Lin Zhong,
Jiong Luo,
Yunsi Fei,
Niraj K. Jha:
Register Binding Based Power Management for High-level Synthesis of Control-Flow Intensive Behaviors.
ICCD 2002: 391-394 |
| 3 | EE | Jiong Luo,
Niraj K. Jha:
Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems.
VLSI Design 2002: 719- |
| 2001 |
|---|
| 2 | EE | Jiong Luo,
Niraj K. Jha:
Battery-Aware Static Scheduling for Distributed Real-Time Embedded Systems.
DAC 2001: 444-449 |
| 2000 |
|---|
| 1 | | Jiong Luo,
Niraj K. Jha:
Power-Conscious Joint Scheduling of Periodic Task Graphs and Aperiodic Tasks in Distributed Real-Time Embedded Systems.
ICCAD 2000: 357-364 |
