2004 |
7 | EE | Cecilia Metra,
Stefano Di Francescantonio,
T. M. Mak:
Implications of Clock Distribution Faults and Issues with Screening Them during Manufacturing Testing.
IEEE Trans. Computers 53(5): 531-546 (2004) |
2003 |
6 | EE | Cecilia Metra,
Stefano Di Francescantonio,
Martin Omaña:
Automatic Modification of Sequential Circuits for Self-Checking Implementation.
DFT 2003: 417-424 |
5 | EE | Cecilia Metra,
Stefano Di Francescantonio,
Michele Favalli,
Bruno Riccò:
Scan flip-flops with on-line testing ability with respect to input delay and crosstalk faults.
Microelectronics Journal 34(1): 23-29 (2003) |
2002 |
4 | EE | Cecilia Metra,
Stefano Di Francescantonio,
Giuseppe Marrale:
On-Line Testing of Transient Faults Affecting Functional Blocks of FCMOS, Domino and FPGA-Implemented Self-Checking Circuits.
DFT 2002: 207-215 |
3 | EE | Cecilia Metra,
Stefano Di Francescantonio,
T. M. Mak:
Clock Faults? Impact on Manufacturing Testing and Their Possible Detection Through On-Line Testing.
ITC 2002: 100-109 |
2 | EE | Cecilia Metra,
Michele Favalli,
Stefano Di Francescantonio,
Bruno Riccò:
On-Chip Clock Faults' Detector.
J. Electronic Testing 18(4-5): 555-564 (2002) |
2001 |
1 | EE | Cecilia Metra,
Stefano Di Francescantonio,
Bruno Riccò,
T. M. Mak:
Evaluation of Clock Distribution Networks' Most Likely Faults and Produced Effects.
DFT 2001: 357-365 |