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M. Karabernou

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2001
2 P. Lamaty, B. Mazar, Didier Demigny, Lounis Kessal, M. Karabernou: Two ASIC for Low and Middle Levels of Real Time Image Processing. VLSI-SOC 2001: 3-14
1 Lounis Kessal, R. Bourguiba, Didier Demigny, N. Boudouani, M. Karabernou: Reconfigurable Architecture Using High Speed FPGA. VLSI-SOC 2001: 75-86

Coauthor Index

1N. Boudouani [1]
2R. Bourguiba [1]
3Didier Demigny [1] [2]
4Lounis Kessal [1] [2]
5P. Lamaty [2]
6B. Mazar [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)