2001 | ||
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2 | P. Lamaty, B. Mazar, Didier Demigny, Lounis Kessal, M. Karabernou: Two ASIC for Low and Middle Levels of Real Time Image Processing. VLSI-SOC 2001: 3-14 | |
1 | Lounis Kessal, R. Bourguiba, Didier Demigny, N. Boudouani, M. Karabernou: Reconfigurable Architecture Using High Speed FPGA. VLSI-SOC 2001: 75-86 |
1 | N. Boudouani | [1] |
2 | R. Bourguiba | [1] |
3 | Didier Demigny | [1] [2] |
4 | Lounis Kessal | [1] [2] |
5 | P. Lamaty | [2] |
6 | B. Mazar | [2] |