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N. Boudouani

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2001
3 Lounis Kessal, R. Bourguiba, Didier Demigny, N. Boudouani, M. Karabernou: Reconfigurable Architecture Using High Speed FPGA. VLSI-SOC 2001: 75-86
2000
2EEDidier Demigny, Lounis Kessal, R. Bourguiba, N. Boudouani: How to Use High Speed Reconfigurable FPGA for Real Time Image Processing? CAMP 2000: 240-
1 Lounis Kessal, Didier Demigny, N. Boudouani, R. Bourgiba: Reconfigurable Hardware for Real Time Image Processing. ICIP 2000

Coauthor Index

1R. Bourgiba [1]
2R. Bourguiba [2] [3]
3Didier Demigny [1] [2] [3]
4M. Karabernou [3]
5Lounis Kessal [1] [2] [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)