Chirayu S. Amin

2008
16	EE	Noel Menezes, Chandramouli V. Kashyap, Chirayu S. Amin: A "true" electrical cell model for timing, noise, and power grid verification. DAC 2008: 462-467
15	EE	Chandramouli V. Kashyap, Pouria Bastani, Kip Killpack, Chirayu S. Amin: Silicon feedback to improve frequency of high-performance microprocessors: an overview. ICCAD 2008: 778-782
2007
14	EE	Chandramouli V. Kashyap, Chirayu S. Amin, Noel Menezes, Eli Chiprout: A nonlinear cell macromodel for digital applications. ICCAD 2007: 678-685
2006
13	EE	Chirayu S. Amin, Chandramouli V. Kashyap, Noel Menezes, Kip Killpack, Eli Chiprout: A multi-port current source model for multiple-input switching effects in CMOS library cells. DAC 2006: 247-252
2005
12	EE	Chirayu S. Amin, Noel Menezes, Kip Killpack, Florentin Dartu, Umakanta Choudhury, Nagib Hakim, Yehea I. Ismail: Statistical static timing analysis: how simple can we get? DAC 2005: 652-657
11	EE	Chirayu S. Amin, Yehea I. Ismail, Florentin Dartu: Piece-wise approximations of RLCK circuit responses using moment matching. DAC 2005: 927-932
10		Ahmed M. Shebaita, Chirayu S. Amin, Florentin Dartu, Yehea I. Ismail: Expanding the frequency range of AWE via time shifting. ICCAD 2005: 935-938
9	EE	Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Ismail: Realizable reduction of interconnect circuits including self and mutual inductances. IEEE Trans. on CAD of Integrated Circuits and Systems 24(2): 271-277 (2005)
8	EE	Chirayu S. Amin, Florentin Dartu, Yehea I. Ismail: Weibull-based analytical waveform model. IEEE Trans. on CAD of Integrated Circuits and Systems 24(8): 1156-1168 (2005)
2004
7	EE	Yehea I. Ismail, Chirayu S. Amin: Computation of signal threshold crossing times directly from higher order moments. ICCAD 2004: 246-253
6	EE	Chirayu S. Amin, Florentin Dartu, Yehea I. Ismail: Modeling unbuffered latches for timing analysis. ICCAD 2004: 254-260
5	EE	Yehea I. Ismail, Chirayu S. Amin: Computation of signal-threshold crossing times directly from higher order moments. IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1264-1276 (2004)
2003
4	EE	Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Ismail: Realizable RLCK circuit crunching. DAC 2003: 226-231
3	EE	Shizhong Mei, Chirayu S. Amin, Yehea I. Ismail: Efficient model order reduction including skin effect. DAC 2003: 232-237
2	EE	Chirayu S. Amin, Florentin Dartu, Yehea I. Ismail: Weibull Based Analytical Waveform Model. ICCAD 2003: 161-168
1	EE	Masud H. Chowdhury, Chirayu S. Amin, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter: Realizable reduction of RLC circuits using node elimination. ISCAS (3) 2003: 494-497

Coauthor Index

1	Pouria Bastani	[15]
2	Eli Chiprout	[13] [14]
3	Umakanta Choudhury	[12]
4	Masud H. Chowdhury	[1] [4] [9]
5	Florentin Dartu	[2] [6] [8] [10] [11] [12]
6	Nagib Hakim	[12]
7	Yehea I. Ismail	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
8	Chandramouli V. Kashyap	[1] [13] [14] [15] [16]
9	Kip Killpack	[12] [13] [15]
10	Byron Krauter	[1]
11	Shizhong Mei	[3]
12	Noel Menezes	[12] [13] [14] [16]
13	Ahmed M. Shebaita	[10]