Chiou-Yng Lee

2008
21	EE	Chiou-Yng Lee: Concurrent Error Detection in Digit-Serial Normal Basis Multiplication over GF(2m). AINA Workshops 2008: 1499-1504
20	EE	Chin-Chin Chen, Chiou-Yng Lee, Erl-Huei Lu: Combined circuit architecture for computing normal basis and montgomery multiplications over GF(2m). Mobility Conference 2008: 46
19	EE	Chiou-Yng Lee: Low-Complexity Parallel Systolic Montgomery Multipliers over GF(2m) Using Toeplitz Matrix-Vector Representation. IEICE Transactions 91-A(6): 1470-1477 (2008)
18	EE	Chin-Chin Chen, Chiou-Yng Lee, Erl-Huei Lu: Scalable and Systolic Montgomery Multipliers over GF(2m). IEICE Transactions 91-A(7): 1763-1771 (2008)
17	EE	Chiou-Yng Lee: Low-complexity bit-parallel systolic multipliers over GF(2m). Integration 41(1): 106-112 (2008)
16	EE	Chiou-Yng Lee, Che Wun Chiou: New Bit-Parallel Systolic Architectures for Computing Multiplication, Multiplicative Inversion and Division in GF(2m) Under Polynomial Basis and Normal Basis Representations. Signal Processing Systems 52(3): 313-324 (2008)
2007
15	EE	Chiou-Yng Lee, Yung-Hui Chen: Low-Complexity Parallel Systolic Architectures for Computing Multiplication and Squaring over FG(2m). AINA Workshops (1) 2007: 906-911
14	EE	Chiou-Yng Lee, Yung-Hui Chen, Che Wun Chiou, Jim-Min Lin: Unified Parallel Systolic Multiplier Over GF(2m). J. Comput. Sci. Technol. 22(1): 28-38 (2007)
2006
13	EE	Chiou-Yng Lee, Yu-Hsin Chiu, Che Wun Chiou: New Bit-Parallel Systolic Multiplier over GF(2m) Using The Modified Booth's Algorithm. APCCAS 2006: 610-613
12	EE	Che Wun Chiou, Chiou-Yng Lee, An-Wen Deng, Jim-Min Lin: Concurrent Error Detection in Montgomery Multiplication over GF(2m). IEICE Transactions 89-A(2): 566-574 (2006)
11	EE	Chiou-Yng Lee, Jenn-Shyong Horng, I-Chang Jou: Low-Complexity Bit-Parallel Multiplier over GF(2m) Using Dual Basis Representation. J. Comput. Sci. Technol. 21(6): 887-892 (2006)
10	EE	Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin: Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2m). J. Electronic Testing 22(2): 143-150 (2006)
2005
9	EE	Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin: Low-complexity bit-parallel dual basis multipliers using the modified Booth's algorithm. Computers & Electrical Engineering 31(7): 444-459 (2005)
8	EE	Che Wun Chiou, Chiou-Yng Lee: Multiplexer-based double-exponentiation for normal basis of GF(2m). Computers & Security 24(1): 83-86 (2005)
7	EE	Chiou-Yng Lee, Jenn-Shyong Horng, I-Chang Jou, Erl-Huei Lu: Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2m). IEEE Trans. Computers 54(9): 1061-1070 (2005)
6	EE	Chiou-Yng Lee, Che Wun Chiou: Efficient Design of Low-Complexity Bit-Parallel Systolic Hankel Multipliers to Implement Multiplication in Normal and Dual Bases of GF (2m). IEICE Transactions 88-A(11): 3169-3179 (2005)
5	EE	Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin: Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m). J. Electronic Testing 21(5): 539-549 (2005)
2004
4		Chiou-Yng Lee, Chung-Jyi Chang: Low-complexity linear array multiplier for normal basis of type-II. ICME 2004: 1515-1518
2002
3	EE	Chiou-Yng Lee, Ya-Cheng Lu, Erl-Huei Lu: Low-complexity systolic multiplier over GF(2/sup m/) using weakly dual basis. APCCAS (1) 2002: 367-372
2001
2	EE	Chiou-Yng Lee, Erl-Huei Lu, Jau-Yien Lee: New bit-parallel systolic multipliers for a class of GF(2m). ISCAS (4) 2001: 578-581
1	EE	Chiou-Yng Lee, Erl-Huei Lu, Jau-Yien Lee: Bit-Parallel Systolic Multipliers for GF(2m) Fields Defined by All-One and Equally Spaced Polynomials. IEEE Trans. Computers 50(5): 385-393 (2001)

Coauthor Index

1	Chung-Jyi Chang	[4]
2	Chin-Chin Chen	[18] [20]
3	Yung-Hui Chen	[14] [15]
4	Che Wun Chiou	[5] [6] [8] [9] [10] [12] [13] [14] [16]
5	Yu-Hsin Chiu	[13]
6	An-Wen Deng	[12]
7	Jenn-Shyong Horng	[7] [11]
8	I-Chang Jou	[7] [11]
9	Jau-Yien Lee	[1] [2]
10	Jim-Min Lin	[5] [9] [10] [12] [14]
11	Erl-Huei Lu	[1] [2] [3] [7] [18] [20]
12	Ya-Cheng Lu	[3]

Colors in the list of coauthors