| 2004 |
|---|
| 6 | EE | Vishak Venkatraman,
Andrew Laffely,
Jinwook Jang,
Hempraveen Kukkamalla,
Zhi Zhu,
Wayne Burleson:
NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods.
SLIP 2004: 69-75 |
| 5 | EE | Jian Liang,
Andrew Laffely,
S. Srinivasan,
Russell Tessier:
An architecture and compiler for scalable on-chip communication.
IEEE Trans. VLSI Syst. 12(7): 711-726 (2004) |
| 4 | EE | Prashant Jain,
Andrew Laffely,
Wayne Burleson,
Russell Tessier,
Dennis Goeckel:
Dynamically Parameterized Algorithms and Architectures to Exploit Signal Variations.
VLSI Signal Processing 36(1): 27-40 (2004) |
| 2003 |
|---|
| 3 | | Andrew Laffely,
Jian Liang,
Russell Tessier,
Wayne Burleson:
Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores.
ICIP (3) 2003: 105-108 |
| 2 | EE | Lilian Bossuet,
Wayne Burleson,
Guy Gogniat,
Vikas Anand,
Andrew Laffely,
Jean Luc Philippe:
Targeting Tiled Architectures in Design Exploration.
IPDPS 2003: 172 |
| 1 | EE | Andrew Laffely,
Wayne Burleson:
Using System On-A-Chip As A Vehicle For VLSI Design Education.
MSE 2003: 148-149 |
