| 2002 |
|---|
| 4 | EE | B. Bailey,
A. Metayer,
B. Svrcek,
Nandu Tendolkar,
E. Wolf,
Eric Fiene,
Mike Alexander,
Rick Woltenberg,
Rajesh Raina:
Test Methodology for Motorola's High Performance e500 Core Based on PowerPC Instruction Set Architecture.
ITC 2002: 574-583 |
| 3 | EE | Nandu Tendolkar,
Rajesh Raina,
Rick Woltenberg,
Xijiang Lin,
Bruce Swanson,
Greg Aldrich:
Novel Techniques for Achieving High At-Speed Transition Fault Test Coverage for Motorola's Microprocessors Based on PowerPC(tm) Instruction Set Architecture.
VTS 2002: 3-8 |
| 2000 |
|---|
| 2 | EE | Nandu Tendolkar,
Robert F. Molyneaux,
Carol Pyron,
Rajesh Raina:
At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm) Microprocessor.
VTS 2000: 3-8 |
| 1999 |
|---|
| 1 | | Carol Pyron,
Mike Alexander,
James Golab,
George Joos,
Bruce Long,
Robert F. Molyneaux,
Rajesh Raina,
Nandu Tendolkar:
DFT advances in the Motorola's MPC7400, a PowerPC G4 microprocessor.
ITC 1999: 137-146 |
