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2002 | ||
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1 | EE | B. Bailey, A. Metayer, B. Svrcek, Nandu Tendolkar, E. Wolf, Eric Fiene, Mike Alexander, Rick Woltenberg, Rajesh Raina: Test Methodology for Motorola's High Performance e500 Core Based on PowerPC Instruction Set Architecture. ITC 2002: 574-583 |
1 | Mike Alexander | [1] |
2 | B. Bailey | [1] |
3 | Eric Fiene | [1] |
4 | A. Metayer | [1] |
5 | Rajesh Raina | [1] |
6 | Nandu Tendolkar | [1] |
7 | E. Wolf | [1] |
8 | Rick Woltenberg | [1] |